From 9ef36faa614528b66e0a6ba58a4c40b246658b83 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marko=20M=C3=A4kel=C3=A4?= Date: Fri, 28 Aug 2020 14:44:36 +0300 Subject: [PATCH] MDEV-23618 InnoDB lacks IA-32 CRC-32C acceleration on GCC 4 When MDEV-22669 introduced CRC-32C acceleration to IA-32, it worked around a compiler bug by disabling the acceleration on GCC 4 for IA-32 altogether, even though the compiler bug only affects -fPIC builds that are targeting IA-32. Let us extend the solution fe5dbfe723427a3606c41409626dc853f997e679 and define HAVE_CPUID_INSTRUCTION that allows us to implement a necessary and sufficient work-around of the compiler bug. --- config.h.cmake | 1 + mysys/CMakeLists.txt | 5 ++++- storage/innobase/ut/ut0crc32.cc | 14 ++------------ 3 files changed, 7 insertions(+), 13 deletions(-) diff --git a/config.h.cmake b/config.h.cmake index 0de5c2be3e0..3e41e0ac3af 100644 --- a/config.h.cmake +++ b/config.h.cmake @@ -103,6 +103,7 @@ #cmakedefine HAVE_LIBWRAP 1 #cmakedefine HAVE_SYSTEMD 1 +#cmakedefine HAVE_CPUID_INSTRUCTION 1 #cmakedefine HAVE_CLMUL_INSTRUCTION 1 #cmakedefine HAVE_CRC32_VPMSUM 1 diff --git a/mysys/CMakeLists.txt b/mysys/CMakeLists.txt index f72608aa1a9..54f78922f2b 100644 --- a/mysys/CMakeLists.txt +++ b/mysys/CMakeLists.txt @@ -58,7 +58,9 @@ IF (WIN32) my_win_popen.cc) ENDIF() -IF(NOT MSVC AND CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86") +IF(MSVC) + SET(HAVE_CPUID_INSTRUCTION 1 CACHE BOOL "") +ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86") #Check for CPUID and PCLMUL. GCC before version 5 would refuse to emit the #CPUID instruction for -m32 -fPIC because it would clobber the EBX register. CHECK_C_SOURCE_COMPILES(" @@ -70,6 +72,7 @@ IF(NOT MSVC AND CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86") }" HAVE_CLMUL_INSTRUCTION) IF(HAVE_CLMUL_INSTRUCTION) + SET(HAVE_CPUID_INSTRUCTION 1 CACHE BOOL "") SET(MYSYS_SOURCES ${MYSYS_SOURCES} crc32/crc32_x86.c) ENDIF() ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64") diff --git a/storage/innobase/ut/ut0crc32.cc b/storage/innobase/ut/ut0crc32.cc index 1ddac168d95..80a0d165069 100644 --- a/storage/innobase/ut/ut0crc32.cc +++ b/storage/innobase/ut/ut0crc32.cc @@ -102,17 +102,7 @@ const char* ut_crc32_implementation = "Using POWER8 crc32 instructions"; extern "C" { uint32_t crc32c_aarch64(uint32_t crc, const unsigned char *buffer, uint64_t len); }; -# elif defined(_MSC_VER) -# define TRY_SSE4_2 -# elif defined (__GNUC__) -# ifdef __x86_64__ -# define TRY_SSE4_2 -# elif defined(__i386__) && (__GNUC__ > 4 || defined __clang__) -# define TRY_SSE4_2 -# endif -# endif - -# ifdef TRY_SSE4_2 +# elif defined HAVE_CPUID_INSTRUCTION /** return whether SSE4.2 instructions are available */ static inline bool has_sse4_2() { @@ -349,7 +339,7 @@ void ut_crc32_init() ut_crc32_implementation= crc32c_implementation; return; } -# elif defined(TRY_SSE4_2) +# elif defined HAVE_CPUID_INSTRUCTION if (has_sse4_2()) { ut_crc32_low= ut_crc32_hw;