- Adds time and delay units
- Adds time domain tuning parameters entry and storage
- Adds pad-to-die delay property
- Adds time domain parameter interface for length / delay calculations
- Adds unit tracking for numerical constants through LIBEVAL
- Will need future work to truly propagate through binary expressions
- Adds time domain tuning to meander placers
- Adds time delay display to net inspector panel
- Modifies DRC to handle time domain constraints
There are two netclass name methods, which previously were not
obvious in their uses. These have been renamed to now have:
GetName() : Used for internal or tooling (e.g. netlist export) usage
GetHumanReadableName() : Used for display to users (e.g. in infobars)
Fixing the previous unclear naming will result in fewer bugs
when users start using the multiple netclass functionality, as
the incorrect usage had started creeping in to new code. Also this
will help authors of new code select the correct name method.
Recommendation is to avoid using the year nomenclature as this
information is already encoded in the git repo. Avoids needing to
repeatly update.
Also updates AUTHORS.txt from current repo with contributor names
Also reduces line-wrapping a bit.
I don't think this fixes the linked bug, but I can't reproduce it
and this was found while reviewing the code.
Fixes https://gitlab.com/kicad/code/kicad/issues/8810
ADDED Eeschema-specific netclass settings including wire and bus
thickness, color, and line style.
Netclasses override individual wire & bus colors and line styles.
If that proves an issue we might look at something more sophisticated
with inheritance.
Fixes https://gitlab.com/kicad/code/kicad/issues/4581
Various architecture upgrades to support this.
Creating a BOARD now requires a valid PROJECT, which caused
some (mostly transparent) changes to the Python API internals.
ADDED: Project local settings file
CHANGED: Board design settings are no longer stored in PCB file
CHANGED: Net classes are no longer stored in PCB file
CHANGED: Importing board settings now reads boards, not just projects
Fixes https://gitlab.com/kicad/code/kicad/-/issues/2578
Fixes https://gitlab.com/kicad/code/kicad/-/issues/4070
*) Extend SWIG support deeper into the BOARD class.
*) Move swig *.i files into a directory identified for SWIG, in preparation
for a parallel universe involving Phoenix's SIP.
*) Move swig files which will be common to both eeschema and pcbnew into
common/swig.
*) Sketch out a "common" python module, and plan on dovetailing that into a
libkicad_shared.{dll,so}
*) Add common/swig/ki_exceptions.i and define a macro HANDLE_EXCEPTIONS()
which is to be applied to any function which needs C++ to python
exception translation.
*) Move the test for SWIG tool into top level CMakeLists.txt file for use
in all python modules beyond pcbnew, i.e. eeschema and common.
*) Add SWIG_MODULE_pcbnew_EXTRA_DEPS which generates a better Makefile, one
which rebuilds the swig generated *.cxx file when one of its dependencies
change.
*) Re-architect the board.i file so that it can be split into multiple *.i
files easily.
*) Make some KIWAY from python progress, in preparation for Modular KiCad
phase III.
* Switched hashtables.h over to std::undordered_map from boost version.
* Added new macros DECL_VEC_FOR_SWIG() and DECL_MAP_FOR_SWIG() in macros.h.
These along with future DECL_HASH_FOR_SWIG() unify the declaration to swig
and C++ so that the resultant type name is common in both languages, and
the types AGREE.
* Fixed swigging of NETINFO_ITEM and NETINFO_LIST via magic.
* Newly exposed (python wrapped) are: D_PADS, TRACKS (was TRACK_PTRS),
NETNAME_MAP, NETCODE_MAP, wxString (without constructor purposely, read
comment in wx.i), MARKERS, ZONE_CONTAINERS, NETCLASSPTR, KICAD_T types.
* std::vector<SOMETHING*> tends to end up named SOMETHINGS in C++ and python.
Having the name consistent between like types is helpful, and between
languages. std::map<> ends up as SOMETHING_MAP.
* NETINFO_LIST::m_netNames and NETINFO_LIST::m_netCodes are now std::map
instead of hashtables, because swig does not yet support std::unordered_map.
* You can now get to any netclass or net info. NETNAMES_MAP and NETCODES_MAP
are traversable basically the same as a python dictionary using a python
string (not wsString) as the key! The wxString typemap converts python
string to wxString before the lookup happens. Iteration also works.
legacy plugin: better compatibility with old brd files (current track width and current vias size, stored in SETUP section, were not read from file and incorrectly set)
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
* Move EDA_TEXT object into separate header and source file.
* Compile EDA_TEXT class separately for BOARD_ITEM and SCH_ITEM units.
* Compile PAGE_INFO class separately for BOARD_ITEM and SCH_ITEM units.
* Minor formatting tweaks to Pcbnew s-expression file.
* Move internal unit formatting functions into BOARD_ITEM and SCH_ITEM.
* Save dialog now supports saving boards to new file format.
* Add CMake option to build s-expression file save.
* Add check to main CMakeList.txt file to make sure nanometers are
enables when the new file format is built.
* Minor tweaks to object format functions for improved output.
* Rename kicad_plugin.h/cpp to legacy_plugin.h/cpp.
* Add s-expression Format() function to all objects derived from
BOARD_ITEM.
* Add s-expression Format() function to base objects as required.
* Add functions to convert coordinates from base internal units
(nanometers) to millimeter string for writing to s-expression
file.
* Add temporary dummy conversion functions to prevent link errors
until schematic and board object and action code can be separated
into DSO/DLL.
* Add CMake build option to build Pcbnew with nanometer internal
units.
Seth Hillbrand
Jeff Young
JamesJCode
Wayne Stambaugh
Jon Evans
kliment
Marek Roszko
jean-pierre charras
Oleg Endo
Seth Hillbrand
Camille
Russell Oliver
Simon Schubert
Maciej Suminski
Kristoffer Ödmark
Dick Hollenbeck
Tomasz Wlostowski
Simon Richter
Chris Pavlina
Wayne Stambaugh