- Adds time and delay units
- Adds time domain tuning parameters entry and storage
- Adds pad-to-die delay property
- Adds time domain parameter interface for length / delay calculations
- Adds unit tracking for numerical constants through LIBEVAL
- Will need future work to truly propagate through binary expressions
- Adds time domain tuning to meander placers
- Adds time delay display to net inspector panel
- Modifies DRC to handle time domain constraints
Recommendation is to avoid using the year nomenclature as this
information is already encoded in the git repo. Avoids needing to
repeatly update.
Also updates AUTHORS.txt from current repo with contributor names
Previously, these checks injected a custom handler to add graphic
objects to a DRC marker. This was not thread-safe and was causing
non-deterministic crashes. The DRC reporting methods now accept
a customer handler which is called on the newly created
PCB_MARKER within the commit context. This defaults to nullptr
for DRC checks which do not require graphics or other additional
processing.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/19282
This MR adds a new DRC Test provider for the angle between two connected Track segments.
Rule example:
(rule test_track_angle (constraint track_angle (min 135)) (severity error) )
We are frequently testing thousands of track segments. They can each be
uniquely tested in parallel with reporting and marking guarded by
mutexes. This speeds up the DRC tests substantially
Fixes https://gitlab.com/kicad/code/kicad/-/issues/15466
... because that's where we do hole-to-copper clearance testing.
Also augments the Clearance Resolution reporter to report on said
hole clearances.
And changes the interpretation of HOLE_CLEARANCE_CONSTRAINT to include
local pad clearance overrides.
Fixes https://gitlab.com/kicad/code/kicad/issues/7325
Jeff Young
JamesJCode
Seth Hillbrand
jean-pierre charras
Daniel Treffenstädt
Mike Williams
Marek Roszko
Wayne Stambaugh
Jon Evans