Jeff Young 5 years ago
parent
commit
f620f8bdd3
  1. 2
      pcbnew/drc/drc_item.cpp
  2. 76
      pcbnew/drc/drc_test_provider_edge_clearance.cpp
  3. 11
      pcbnew/drc/drc_test_provider_silk_to_mask.cpp
  4. 24
      pcbnew/drc/drc_test_provider_silk_to_silk.cpp

2
pcbnew/drc/drc_item.cpp

@ -77,7 +77,7 @@ DRC_ITEM DRC_ITEM::trackDangling( DRCE_DANGLING_TRACK,
wxT( "track_dangling" ) );
DRC_ITEM DRC_ITEM::holeClearance( DRCE_HOLE_CLEARANCE,
_( "Hole clearance" ),
_( "Hole clearance violation" ),
wxT( "hole_clearance" ) );
DRC_ITEM DRC_ITEM::holeNearHole( DRCE_DRILLED_HOLES_TOO_CLOSE,

76
pcbnew/drc/drc_test_provider_edge_clearance.cpp

@ -31,13 +31,15 @@
#include <drc/drc_test_provider_clearance_base.h>
/*
Board edge clearance test. Checks all items for their mechanical clearances against the board edge.
Board edge clearance test. Checks all items for their mechanical clearances against the board
edge.
Errors generated:
- DRCE_COPPER_EDGE_CLEARANCE
TODO:
- separate holes to edge check
- tester only looks for edge crossings. it doesn't check if items are inside/outside the board area.
- tester only looks for edge crossings. it doesn't check if items are inside/outside the board
area.
- pad test missing!
*/
@ -82,11 +84,6 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
{
m_largestClearance = worstClearanceConstraint.GetValue().Min();
}
else
{
reportAux( "No Clearance constraints found..." );
return false;
}
reportAux( "Worst clearance : %d nm", m_largestClearance );
@ -114,21 +111,21 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
forEachGeometryItem( {}, LSET::AllCuMask(), queryBoardGeometryItems );
wxString val;
wxGetEnv( "WXTRACE", &val);
wxGetEnv( "WXTRACE", &val );
drc_dbg( 2, "outline: %d items, board: %d items\n",
(int) boardOutline.size(), (int) boardItems.size() );
for( PCB_SHAPE* outlineItem : boardOutline )
{
if( m_drcEngine->IsErrorLimitExceeded( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE ) )
if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_EDGE_CLEARANCE ) )
break;
const std::shared_ptr<SHAPE>& refShape = outlineItem->GetEffectiveShape();
for( BOARD_ITEM* boardItem : boardItems )
{
if( m_drcEngine->IsErrorLimitExceeded( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE ) )
if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_EDGE_CLEARANCE ) )
break;
drc_dbg( 10, "RefT %d %p %s %d\n", outlineItem->Type(), outlineItem,
@ -136,6 +133,9 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
drc_dbg( 10, "BoardT %d %p %s %d\n", boardItem->Type(), boardItem,
boardItem->GetClass(), boardItem->GetLayer() );
if ( isInvisibleText( boardItem ) )
continue;
const std::shared_ptr<SHAPE>& shape = boardItem->GetEffectiveShape();
auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE,
@ -165,6 +165,62 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
}
}
if( !reportPhase( _( "Checking silkscreen to board edge clearances..." ) ) )
return false;
boardItems.clear();
forEachGeometryItem( {}, LSET( 2, F_SilkS, B_SilkS ), queryBoardGeometryItems );
for( PCB_SHAPE* outlineItem : boardOutline )
{
if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) )
break;
const std::shared_ptr<SHAPE>& refShape = outlineItem->GetEffectiveShape();
for( BOARD_ITEM* boardItem : boardItems )
{
if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) )
break;
drc_dbg( 10, "RefT %d %p %s %d\n", outlineItem->Type(), outlineItem,
outlineItem->GetClass(), outlineItem->GetLayer() );
drc_dbg( 10, "BoardT %d %p %s %d\n", boardItem->Type(), boardItem,
boardItem->GetClass(), boardItem->GetLayer() );
const std::shared_ptr<SHAPE>& shape = boardItem->GetEffectiveShape();
auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_TO_MASK,
outlineItem, boardItem );
int minClearance = constraint.GetValue().Min();
int actual;
VECTOR2I pos;
accountCheck( constraint );
if( refShape->Collide( shape.get(), minClearance, &actual, &pos ) )
{
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_MASK_CLEARANCE );
if( minClearance > 0 )
{
m_msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
constraint.GetName(),
MessageTextFromValue( userUnits(), minClearance ),
MessageTextFromValue( userUnits(), actual ) );
drcItem->SetErrorMessage( m_msg );
}
drcItem->SetItems( outlineItem, boardItem );
drcItem->SetViolatingRule( constraint.GetParentRule() );
reportViolation( drcItem, (wxPoint) pos );
}
}
}
reportRuleStatistics();
return true;

11
pcbnew/drc/drc_test_provider_silk_to_mask.cpp

@ -141,7 +141,16 @@ bool DRC_TEST_PROVIDER_SILK_TO_MASK::Run()
return true;
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_MASK_CLEARANCE );
wxString msg;
if( minClearance > 0 )
{
m_msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
constraint.GetName(),
MessageTextFromValue( userUnits(), minClearance ),
MessageTextFromValue( userUnits(), actual ) );
drcItem->SetErrorMessage( m_msg );
}
drcItem->SetItems( aRefItem->parent, aTestItem->parent );
drcItem->SetViolatingRule( constraint.GetParentRule() );

24
pcbnew/drc/drc_test_provider_silk_to_silk.cpp

@ -166,19 +166,17 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
return true;
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_SILK_CLEARANCE );
wxString msg;
/* For now we're just reporting silkscreen collisions without any dimensional
* data. I suspect it's usually noise, and they can always use the clearance
* resolution report if they want.
*
msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
constraint.GetParentRule()->m_Name,
MessageTextFromValue( userUnits(), minClearance ),
MessageTextFromValue( userUnits(), actual ) );
drcItem->SetErrorMessage( msg );
*/
if( minClearance > 0 )
{
m_msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
constraint.GetParentRule()->m_Name,
MessageTextFromValue( userUnits(), minClearance ),
MessageTextFromValue( userUnits(), actual ) );
drcItem->SetErrorMessage( m_msg );
}
drcItem->SetItems( aRefItem->parent, aTestItem->parent );
drcItem->SetViolatingRule( constraint.GetParentRule() );

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