Browse Source

Don't sequence layers when order doesn't matter.

pull/18/head
Jeff Young 5 months ago
parent
commit
c758a2fbaf
  1. 2
      pcbnew/board_connected_item.cpp
  2. 2
      pcbnew/board_item.cpp
  3. 22
      pcbnew/collectors.cpp
  4. 2
      pcbnew/dialogs/dialog_drc.cpp
  5. 2
      pcbnew/dialogs/dialog_footprint_properties.cpp
  6. 2
      pcbnew/dialogs/dialog_footprint_properties_fp_editor.cpp
  7. 2
      pcbnew/dialogs/dialog_track_via_properties.cpp
  8. 11
      pcbnew/dialogs/panel_setup_layers.cpp
  9. 2
      pcbnew/drc/drc_rtree.h
  10. 9
      pcbnew/drc/drc_test_provider_connection_width.cpp
  11. 4
      pcbnew/drc/drc_test_provider_copper_clearance.cpp
  12. 14
      pcbnew/drc/drc_test_provider_physical_clearance.cpp
  13. 2
      pcbnew/drc/drc_test_provider_silk_clearance.cpp
  14. 2
      pcbnew/drc/drc_test_provider_solder_mask.cpp
  15. 2
      pcbnew/drc/drc_test_provider_zone_connections.cpp
  16. 4
      pcbnew/exporters/gerber_jobfile_writer.cpp
  17. 10
      pcbnew/exporters/step/exporter_step.cpp
  18. 7
      pcbnew/exporters/step/step_pcb_model.cpp
  19. 10
      pcbnew/footprint.cpp
  20. 6
      pcbnew/pcb_edit_frame.cpp
  21. 39
      pcbnew/pcb_io/altium/altium_pcb.cpp
  22. 4
      pcbnew/pcb_io/kicad_sexpr/pcb_io_kicad_sexpr_parser.cpp
  23. 27
      pcbnew/pcb_io/odbpp/odb_entity.cpp
  24. 4
      pcbnew/pcb_painter.cpp
  25. 2
      pcbnew/pcb_shape.cpp
  26. 2
      pcbnew/pcb_track.cpp
  27. 2
      pcbnew/pcbnew_jobs_handler.cpp
  28. 2
      pcbnew/pcbnew_printout.cpp
  29. 2
      pcbnew/plot_board_layers.cpp
  30. 4
      pcbnew/python/scripting/pcbnew_scripting_helpers.cpp
  31. 2
      pcbnew/router/pns_kicad_iface.cpp
  32. 4
      pcbnew/tools/drawing_tool.cpp
  33. 7
      pcbnew/tools/global_edit_tool.cpp
  34. 2
      pcbnew/tools/pad_tool.cpp
  35. 2
      pcbnew/tools/pcb_grid_helper.cpp
  36. 8
      pcbnew/tools/pcb_selection_tool.cpp
  37. 2
      pcbnew/zone.cpp
  38. 10
      pcbnew/zone_filler.cpp

2
pcbnew/board_connected_item.cpp

@ -195,7 +195,7 @@ static struct BOARD_CONNECTED_ITEM_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

2
pcbnew/board_item.cpp

@ -408,7 +408,7 @@ static struct BOARD_ITEM_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

22
pcbnew/collectors.cpp

@ -345,18 +345,16 @@ INSPECT_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* aTestItem, void* aTestData
if( zone )
{
if( zone->HitTestForCorner( m_refPos, accuracy * 2 )
|| zone->HitTestForEdge( m_refPos, accuracy ) )
if( zone->HitTestForCorner( m_refPos, accuracy * 2 ) || zone->HitTestForEdge( m_refPos, accuracy ) )
{
Append( aTestItem );
return INSPECT_RESULT::CONTINUE;
}
else if( !m_Guide->IgnoreZoneFills() )
{
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
if( m_Guide->IsLayerVisible( layer )
&& zone->HitTestFilledArea( layer, m_refPos ) )
if( m_Guide->IsLayerVisible( layer ) && zone->HitTestFilledArea( layer, m_refPos ) )
{
Append( aTestItem );
return INSPECT_RESULT::CONTINUE;
@ -366,8 +364,7 @@ INSPECT_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* aTestItem, void* aTestData
}
else if( aTestItem == footprint )
{
if( footprint->HitTest( m_refPos, accuracy )
&& footprint->HitTestAccurate( m_refPos, accuracy ) )
if( footprint->HitTest( m_refPos, accuracy ) && footprint->HitTestAccurate( m_refPos, accuracy ) )
{
Append( aTestItem );
return INSPECT_RESULT::CONTINUE;
@ -419,18 +416,16 @@ INSPECT_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* aTestItem, void* aTestData
if( zone )
{
if( zone->HitTestForCorner( m_refPos, accuracy * 2 )
|| zone->HitTestForEdge( m_refPos, accuracy ) )
if( zone->HitTestForCorner( m_refPos, accuracy * 2 ) || zone->HitTestForEdge( m_refPos, accuracy ) )
{
Append2nd( aTestItem );
return INSPECT_RESULT::CONTINUE;
}
else if( !m_Guide->IgnoreZoneFills() )
{
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
if( m_Guide->IsLayerVisible( layer )
&& zone->HitTestFilledArea( layer, m_refPos ) )
if( m_Guide->IsLayerVisible( layer ) && zone->HitTestFilledArea( layer, m_refPos ) )
{
Append2nd( aTestItem );
return INSPECT_RESULT::CONTINUE;
@ -443,8 +438,7 @@ INSPECT_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* aTestItem, void* aTestData
// Already tested above, but Coverity can't figure that out
wxCHECK( footprint, INSPECT_RESULT::CONTINUE );
if( footprint->HitTest( m_refPos, accuracy )
&& footprint->HitTestAccurate( m_refPos, accuracy ) )
if( footprint->HitTest( m_refPos, accuracy ) && footprint->HitTestAccurate( m_refPos, accuracy ) )
{
Append2nd( aTestItem );
return INSPECT_RESULT::CONTINUE;

2
pcbnew/dialogs/dialog_drc.cpp

@ -405,7 +405,7 @@ void DIALOG_DRC::OnDRCItemSelected( wxDataViewEvent& aEvent )
PAD* pad = static_cast<PAD*>( aItem );
LSET layers;
for( int layer : aItem->GetLayerSet().Seq() )
for( int layer : aItem->GetLayerSet() )
{
if( pad->FlashLayer( layer ) )
layers.set( layer );

2
pcbnew/dialogs/dialog_footprint_properties.cpp

@ -378,7 +378,7 @@ bool DIALOG_FOOTPRINT_PROPERTIES::TransferDataToWindow()
{
BOARD* board = m_footprint->GetBoard();
for( PCB_LAYER_ID layer : board->GetEnabledLayers().Seq() )
for( PCB_LAYER_ID layer : board->GetEnabledLayers() )
col_size = std::max( col_size, GetTextExtent( board->GetLayerName( layer ) ).x );
// Swatch and gaps:

2
pcbnew/dialogs/dialog_footprint_properties_fp_editor.cpp

@ -381,7 +381,7 @@ bool DIALOG_FOOTPRINT_PROPERTIES_FP_EDITOR::TransferDataToWindow()
{
BOARD* board = m_footprint->GetBoard();
for( PCB_LAYER_ID layer : board->GetEnabledLayers().Seq() )
for( PCB_LAYER_ID layer : board->GetEnabledLayers() )
col_size = std::max( col_size, GetTextExtent( board->GetLayerName( layer ) ).x );
// Swatch and gaps:

2
pcbnew/dialogs/dialog_track_via_properties.cpp

@ -977,7 +977,7 @@ bool DIALOG_TRACK_VIA_PROPERTIES::TransferDataFromWindow()
auto collide =
[&]( BOARD_CONNECTED_ITEM* a, BOARD_CONNECTED_ITEM* b )
{
for( PCB_LAYER_ID layer : LSET( a->GetLayerSet() & b->GetLayerSet() ).Seq() )
for( PCB_LAYER_ID layer : LSET( a->GetLayerSet() & b->GetLayerSet() ) )
{
if( a->GetEffectiveShape( layer )->Collide( b->GetEffectiveShape( layer ).get() ) )
return true;

11
pcbnew/dialogs/panel_setup_layers.cpp

@ -1000,7 +1000,7 @@ bool PANEL_SETUP_LAYERS::testLayerNames()
std::vector<wxString> names;
wxTextCtrl* ctl;
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
// we _can_ rely on m_enabledLayers being current here:
@ -1036,8 +1036,7 @@ bool PANEL_SETUP_LAYERS::testLayerNames()
if( name == wxT( "signal" ) )
{
PAGED_DIALOG::GetDialog( this )->SetError( _( "Layer name \"signal\" is reserved." ),
this, ctl );
PAGED_DIALOG::GetDialog( this )->SetError( _( "Layer name \"signal\" is reserved." ), this, ctl );
return false;
}
@ -1068,7 +1067,6 @@ LSEQ PANEL_SETUP_LAYERS::getRemovedLayersWithItems()
return removedLayers;
PCB_LAYER_COLLECTOR collector;
LSEQ newLayerSeq = newLayers.Seq();
for( PCB_LAYER_ID layer_id : curLayers )
{
@ -1130,14 +1128,13 @@ LSEQ PANEL_SETUP_LAYERS::getNonRemovableLayers()
return inUseLayers;
PCB_LAYER_COLLECTOR collector;
LSEQ newLayerSeq = newLayers.Seq();
for( PCB_LAYER_ID layer_id : curLayers.Seq() )
for( PCB_LAYER_ID layer_id : curLayers )
{
if( IsCopperLayer( layer_id ) ) // Copper layers are not taken into account here
continue;
if( !alg::contains( newLayerSeq, layer_id ) )
if( !alg::contains( newLayers, layer_id ) )
{
collector.SetLayerId( layer_id );
collector.Collect( m_pcb, GENERAL_COLLECTOR::FootprintItems );

2
pcbnew/drc/drc_rtree.h

@ -81,7 +81,7 @@ public:
DRC_RTREE()
{
for( int layer : LSET::AllLayersMask().Seq() )
for( int layer : LSET::AllLayersMask() )
m_tree[layer] = new drc_rtree();
m_count = 0;

9
pcbnew/drc/drc_test_provider_connection_width.cpp

@ -307,8 +307,6 @@ bool DRC_TEST_PROVIDER_CONNECTION_WIDTH::Run()
return false; // DRC cancelled
BOARD* board = m_drcEngine->GetBoard();
LSET copperLayerSet = LSET::AllCuMask( board->GetCopperLayerCount() );
LSEQ copperLayers = copperLayerSet.Seq();
int epsilon = board->GetDesignSettings().GetDRCEpsilon();
// Zone knockouts can be approximated, and always have extra clearance built in
@ -418,9 +416,8 @@ bool DRC_TEST_PROVIDER_CONNECTION_WIDTH::Run()
std::vector<BOARD_ITEM*> contributingItems;
for( auto* item : board->m_CopperItemRTreeCache->GetObjectsAt( location,
aLayer,
aMinWidth ) )
for( BOARD_ITEM* item : board->m_CopperItemRTreeCache->GetObjectsAt( location, aLayer,
aMinWidth ) )
{
if( item->HitTest( location, aMinWidth ) )
contributingItems.push_back( item );
@ -474,7 +471,7 @@ bool DRC_TEST_PROVIDER_CONNECTION_WIDTH::Run()
return 1;
};
for( PCB_LAYER_ID layer : copperLayers )
for( PCB_LAYER_ID layer : LSET::AllCuMask( board->GetCopperLayerCount() ) )
{
for( ZONE* zone : board->m_DRCCopperZones )
{

4
pcbnew/drc/drc_test_provider_copper_clearance.cpp

@ -601,7 +601,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances()
{
PCB_TRACK* track = m_board->Tracks()[trackIdx];
for( PCB_LAYER_ID layer : LSET( track->GetLayerSet() & boardCopperLayers ).Seq() )
for( PCB_LAYER_ID layer : LSET( track->GetLayerSet() & boardCopperLayers ) )
{
std::shared_ptr<SHAPE> trackShape = track->GetEffectiveShape( layer );
@ -981,7 +981,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( )
{
for( PAD* pad : footprint->Pads() )
{
for( PCB_LAYER_ID layer : LSET( pad->GetLayerSet() & boardCopperLayers ).Seq() )
for( PCB_LAYER_ID layer : LSET( pad->GetLayerSet() & boardCopperLayers ) )
{
if( m_drcEngine->IsCancelled() )
return;

14
pcbnew/drc/drc_test_provider_physical_clearance.cpp

@ -151,7 +151,7 @@ bool DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run()
layers |= LSET::PhysicalLayersMask() | courtyards;
}
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
m_itemTree.Insert( item, layer, m_board->m_DRCMaxPhysicalClearance );
return true;
@ -182,7 +182,7 @@ bool DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run()
if( item->Type() == PCB_FOOTPRINT_T )
layers = courtyards;
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
std::shared_ptr<SHAPE> itemShape = item->GetEffectiveShape( layer );
@ -273,23 +273,23 @@ bool DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run()
if( zone && zone->GetIsRuleArea() )
return true; // Continue with other items
for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : item->GetLayerSet() )
{
if( IsCopperLayer( layer ) )
{
if( !reportProgress( ii++, count, progressDelta ) )
return false;
DRC_CONSTRAINT c = m_drcEngine->EvalRules( PHYSICAL_CLEARANCE_CONSTRAINT,
item, nullptr, layer );
DRC_CONSTRAINT c = m_drcEngine->EvalRules( PHYSICAL_CLEARANCE_CONSTRAINT, item, nullptr,
layer );
if( shape )
{
switch( shape->GetShape() )
{
case SHAPE_T::POLY:
testShapeLineChain( shape->GetPolyShape().Outline( 0 ),
shape->GetWidth(), layer, item, c );
testShapeLineChain( shape->GetPolyShape().Outline( 0 ), shape->GetWidth(), layer,
item, c );
break;
case SHAPE_T::BEZIER:

2
pcbnew/drc/drc_test_provider_silk_clearance.cpp

@ -122,7 +122,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
if( !reportProgress( ii++, items, progressDelta ) )
return false;
for( PCB_LAYER_ID layer : LSET( item->GetLayerSet() & targetLayers ).Seq() )
for( PCB_LAYER_ID layer : LSET( item->GetLayerSet() & targetLayers ) )
targetTree.Insert( item, layer );
return true;

2
pcbnew/drc/drc_test_provider_solder_mask.cpp

@ -264,7 +264,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance()
if( isInvisibleText( item ) )
return true;
for( PCB_LAYER_ID layer : silkLayers.Seq() )
for( PCB_LAYER_ID layer : silkLayers )
{
if( !item->IsOnLayer( layer ) )
continue;

2
pcbnew/drc/drc_test_provider_zone_connections.cpp

@ -308,7 +308,7 @@ bool DRC_TEST_PROVIDER_ZONE_CONNECTIONS::Run()
{
if( !zone->IsTeardropArea() )
{
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
zoneLayers.push_back( { zone, layer } );
total_effort += zone->GetFilledPolysList( layer )->FullPointCount();

4
pcbnew/exporters/gerber_jobfile_writer.cpp

@ -466,7 +466,7 @@ void GERBER_JOBFILE_WRITER::addJSONDesignRules()
{
for( PAD* pad : footprint->Pads() )
{
for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : pad->GetLayerSet() )
{
int padClearance = pad->GetOwnClearance( layer );
@ -517,7 +517,7 @@ void GERBER_JOBFILE_WRITER::addJSONDesignRules()
if( zone->GetIsRuleArea() || !zone->IsOnCopperLayer() )
continue;
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
int zclerance = zone->GetOwnClearance( layer );

10
pcbnew/exporters/step/exporter_step.cpp

@ -177,7 +177,7 @@ bool EXPORTER_STEP::buildFootprint3DShapes( FOOTPRINT* aFootprint, VECTOR2D aOri
// This helps with fusing
holePoly.Deflate( m_platingThickness / 2, CORNER_STRATEGY::ROUND_ALL_CORNERS, pad->GetMaxError() );
for( PCB_LAYER_ID pcblayer : pad->GetLayerSet().Seq() )
for( PCB_LAYER_ID pcblayer : pad->GetLayerSet() )
{
if( pad->IsOnLayer( pcblayer ) )
m_poly_holes[pcblayer].Append( holePoly );
@ -208,7 +208,7 @@ bool EXPORTER_STEP::buildFootprint3DShapes( FOOTPRINT* aFootprint, VECTOR2D aOri
if( m_params.m_ExportSoldermask )
{
for( PCB_LAYER_ID pcblayer : pad->GetLayerSet().Seq() )
for( PCB_LAYER_ID pcblayer : pad->GetLayerSet() )
{
if( pcblayer != F_Mask && pcblayer != B_Mask )
continue;
@ -227,7 +227,7 @@ bool EXPORTER_STEP::buildFootprint3DShapes( FOOTPRINT* aFootprint, VECTOR2D aOri
}
// Build 3D shapes of the footprint graphic items:
for( PCB_LAYER_ID pcblayer : m_layersToExport.Seq() )
for( PCB_LAYER_ID pcblayer : m_layersToExport )
{
if( IsCopperLayer( pcblayer ) && !m_params.m_ExportTracksVias )
continue;
@ -448,7 +448,7 @@ bool EXPORTER_STEP::buildTrack3DShape( PCB_TRACK* aTrack, VECTOR2D aOrigin )
if( !skipCopper )
{
for( PCB_LAYER_ID pcblayer : layers.Seq() )
for( PCB_LAYER_ID pcblayer : layers )
{
const std::shared_ptr<SHAPE>& shape = via->GetEffectiveShape( pcblayer );
@ -501,7 +501,7 @@ void EXPORTER_STEP::buildZones3DShape( VECTOR2D aOrigin )
continue;
}
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
SHAPE_POLY_SET fill_shape;
zone->TransformSolidAreasShapesToPolygon( layer, fill_shape );

7
pcbnew/exporters/step/step_pcb_model.cpp

@ -876,8 +876,7 @@ bool STEP_PCB_MODEL::AddPadShape( const PAD* aPad, const VECTOR2D& aOrigin, bool
}
}
if( aPad->GetAttribute() == PAD_ATTRIB::PTH && aPad->IsOnLayer( F_Cu )
&& aPad->IsOnLayer( B_Cu ) )
if( aPad->GetAttribute() == PAD_ATTRIB::PTH && aPad->IsOnLayer( F_Cu ) && aPad->IsOnLayer( B_Cu ) )
{
double f_pos, f_thickness;
double b_pos, b_thickness;
@ -927,8 +926,8 @@ bool STEP_PCB_MODEL::AddPadShape( const PAD* aPad, const VECTOR2D& aOrigin, bool
}
else
{
TransformOvalToPolygon( polyHole, seg_hole->GetSeg().A, seg_hole->GetSeg().B,
width, aPad->GetMaxError(), ERROR_OUTSIDE );
TransformOvalToPolygon( polyHole, seg_hole->GetSeg().A, seg_hole->GetSeg().B, width,
aPad->GetMaxError(), ERROR_OUTSIDE );
}
polyHole.ClearArcs();

10
pcbnew/footprint.cpp

@ -1575,7 +1575,7 @@ SHAPE_POLY_SET FOOTPRINT::GetBoundingHull() const
for( ZONE* zone : m_zones )
{
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
const SHAPE_POLY_SET& layerPoly = *zone->GetFilledPolysList( layer );
@ -3794,7 +3794,7 @@ bool FOOTPRINT::cmp_pads::operator()( const PAD* aFirst, const PAD* aSecond ) co
if( padCopperMatches.has_value() )
return *padCopperMatches;
if( aFirst->GetLayerSet().Seq() != aSecond->GetLayerSet().Seq() )
if( aFirst->GetLayerSet() != aSecond->GetLayerSet() )
return aFirst->GetLayerSet().Seq() < aSecond->GetLayerSet().Seq();
if( aFirst->m_Uuid != aSecond->m_Uuid )
@ -3815,7 +3815,7 @@ bool FOOTPRINT::cmp_padstack::operator()( const PAD* aFirst, const PAD* aSecond
if( aFirst->GetShape() != aSecond->GetShape() )
return aFirst->GetShape() < aSecond->GetShape();
if( aFirst->GetLayerSet().Seq() != aSecond->GetLayerSet().Seq() )
if( aFirst->GetLayerSet() != aSecond->GetLayerSet() )
return aFirst->GetLayerSet().Seq() < aSecond->GetLayerSet().Seq();
if( aFirst->GetDrillSizeX() != aSecond->GetDrillSizeX() )
@ -3866,7 +3866,7 @@ bool FOOTPRINT::cmp_zones::operator()( const ZONE* aFirst, const ZONE* aSecond )
if( aFirst->GetAssignedPriority() != aSecond->GetAssignedPriority() )
return aFirst->GetAssignedPriority() < aSecond->GetAssignedPriority();
if( aFirst->GetLayerSet().Seq() != aSecond->GetLayerSet().Seq() )
if( aFirst->GetLayerSet() != aSecond->GetLayerSet() )
return aFirst->GetLayerSet().Seq() < aSecond->GetLayerSet().Seq();
if( aFirst->Outline()->TotalVertices() != aSecond->Outline()->TotalVertices() )
@ -4123,7 +4123,7 @@ static struct FOOTPRINT_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

6
pcbnew/pcb_edit_frame.cpp

@ -1680,7 +1680,7 @@ void PCB_EDIT_FRAME::OnBoardLoaded()
layerEnum.Choices().Clear();
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
// Canonical name
layerEnum.Map( layer, LSET::Name( layer ) );
@ -1914,7 +1914,7 @@ void PCB_EDIT_FRAME::UpdateUserInterface()
layerEnum.Choices().Clear();
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
// Canonical name
layerEnum.Map( layer, LSET::Name( layer ) );
@ -1924,7 +1924,7 @@ void PCB_EDIT_FRAME::UpdateUserInterface()
}
// Sync visibility with canvas
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
GetCanvas()->GetView()->SetLayerVisible( layer, GetBoard()->IsLayerVisible( layer ) );
// Stackup and/or color theme may have changed

39
pcbnew/pcb_io/altium/altium_pcb.cpp

@ -595,7 +595,7 @@ void ALTIUM_PCB::Parse( const ALTIUM_PCB_COMPOUND_FILE& altiumP
if( !zone )
continue;
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
if( !zone->HasFilledPolysForLayer( layer ) )
continue;
@ -843,27 +843,27 @@ FOOTPRINT* ALTIUM_PCB::ParseFootprint( ALTIUM_PCB_COMPOUND_FILE& altiumLibFile,
changes = false;
alg::for_all_pairs( footprint->Pads().begin(), footprint->Pads().end(),
[&changes]( PAD* aPad1, PAD* aPad2 )
{
if( !( aPad1->GetNumber().IsEmpty() ^ aPad2->GetNumber().IsEmpty() ) )
return;
for( PCB_LAYER_ID layer : aPad1->GetLayerSet().Seq() )
[&changes]( PAD* aPad1, PAD* aPad2 )
{
std::shared_ptr<SHAPE> shape1 = aPad1->GetEffectiveShape( layer );
std::shared_ptr<SHAPE> shape2 = aPad2->GetEffectiveShape( layer );
if( !( aPad1->GetNumber().IsEmpty() ^ aPad2->GetNumber().IsEmpty() ) )
return;
if( shape1->Collide( shape2.get() ) )
for( PCB_LAYER_ID layer : aPad1->GetLayerSet() )
{
if( aPad1->GetNumber().IsEmpty() )
aPad1->SetNumber( aPad2->GetNumber() );
else
aPad2->SetNumber( aPad1->GetNumber() );
std::shared_ptr<SHAPE> shape1 = aPad1->GetEffectiveShape( layer );
std::shared_ptr<SHAPE> shape2 = aPad2->GetEffectiveShape( layer );
if( shape1->Collide( shape2.get() ) )
{
if( aPad1->GetNumber().IsEmpty() )
aPad1->SetNumber( aPad2->GetNumber() );
else
aPad2->SetNumber( aPad1->GetNumber() );
changes = true;
changes = true;
}
}
}
} );
} );
}
// Auto-position reference and value
@ -2169,13 +2169,12 @@ void ALTIUM_PCB::ParsePolygons6Data( const ALTIUM_PCB_COMPOUND_FILE& aAltium
m_highest_pour_index = elem.pourindex;
const ARULE6* planeClearanceRule = GetRuleDefault( ALTIUM_RULE_KIND::PLANE_CLEARANCE );
const ARULE6* zoneClearanceRule = GetRule( ALTIUM_RULE_KIND::CLEARANCE,
wxT( "PolygonClearance" ) );
const ARULE6* zoneClearanceRule = GetRule( ALTIUM_RULE_KIND::CLEARANCE, wxT( "PolygonClearance" ) );
int planeLayers = 0;
int signalLayers = 0;
int clearance = 0;
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
LAYER_T layerType = m_board->GetLayerType( layer );

4
pcbnew/pcb_io/kicad_sexpr/pcb_io_kicad_sexpr_parser.cpp

@ -5599,7 +5599,7 @@ PAD* PCB_IO_KICAD_SEXPR_PARSER::parsePAD( FOOTPRINT* aParent )
{
LSET cuLayers = pad->GetLayerSet() & LSET::AllCuMask();
for( PCB_LAYER_ID layer : cuLayers.Seq() )
for( PCB_LAYER_ID layer : cuLayers )
pad->SetZoneLayerOverride( layer, ZLO_FORCE_NO_ZONE_CONNECTION );
for( token = NextTok(); token != T_RIGHT; token = NextTok() )
@ -6670,7 +6670,7 @@ PCB_VIA* PCB_IO_KICAD_SEXPR_PARSER::parsePCB_VIA()
// Ensure only copper layers are stored int ZoneLayerOverride array
LSET cuLayers = via->GetLayerSet() & LSET::AllCuMask();
for( PCB_LAYER_ID layer : cuLayers.Seq() )
for( PCB_LAYER_ID layer : cuLayers )
{
via->SetZoneLayerOverride( layer, ZLO_FORCE_NO_ZONE_CONNECTION );
}

27
pcbnew/pcb_io/odbpp/odb_entity.cpp

@ -169,9 +169,7 @@ void ODB_MATRIX_ENTITY::InitMatrixLayerData()
}
}
LSEQ layer_seq = m_board->GetEnabledLayers().Seq();
for( PCB_LAYER_ID layer : layer_seq )
for( PCB_LAYER_ID layer : m_board->GetEnabledLayers().Seq() )
{
if( added_layers.find( layer ) != added_layers.end() )
continue;
@ -964,9 +962,10 @@ void ODB_STEP_ENTITY::InitEdaData()
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
{
auto& eda_net = m_edaData.GetNet( zone->GetNetCode() );
auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>(
&m_edaData, EDA_DATA::SUB_NET_PLANE::FILL_TYPE::SOLID,
EDA_DATA::SUB_NET_PLANE::CUTOUT_TYPE::EXACT, 0 );
auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>( &m_edaData,
EDA_DATA::SUB_NET_PLANE::FILL_TYPE::SOLID,
EDA_DATA::SUB_NET_PLANE::CUTOUT_TYPE::EXACT,
0 );
m_plugin->GetPlaneSubnetMap().emplace( std::piecewise_construct,
std::forward_as_tuple( layer, zone ),
std::forward_as_tuple( &subnet ) );
@ -1094,13 +1093,12 @@ bool ODB_STEP_ENTITY::CreateDirectoryTree( ODB_TREE_WRITER& writer )
void ODB_STEP_ENTITY::MakeLayerEntity()
{
LSEQ layers = m_board->GetEnabledLayers().Seq();
LSET layers = m_board->GetEnabledLayers();
const NETINFO_LIST& nets = m_board->GetNetInfo();
// To avoid the overhead of repeatedly cycling through the layers and nets,
// we pre-sort the board items into a map of layer -> net -> items
std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements =
m_plugin->GetLayerElementsMap();
std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements = m_plugin->GetLayerElementsMap();
std::for_each( m_board->Tracks().begin(), m_board->Tracks().end(),
[&layers, &elements]( PCB_TRACK* aTrack )
@ -1124,12 +1122,8 @@ void ODB_STEP_ENTITY::MakeLayerEntity()
std::for_each( m_board->Zones().begin(), m_board->Zones().end(),
[&elements]( ZONE* zone )
{
LSEQ zone_layers = zone->GetLayerSet().Seq();
for( PCB_LAYER_ID layer : zone_layers )
{
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
elements[layer][zone->GetNetCode()].push_back( zone );
}
} );
for( BOARD_ITEM* item : m_board->Drawings() )
@ -1150,10 +1144,9 @@ void ODB_STEP_ENTITY::MakeLayerEntity()
for( PAD* pad : fp->Pads() )
{
LSEQ pad_layers = pad->GetLayerSet().Seq();
VECTOR2I margin;
for( PCB_LAYER_ID layer : pad_layers )
for( PCB_LAYER_ID layer : pad->GetLayerSet() )
{
bool onCopperLayer = LSET::AllCuMask().test( layer );
bool onSolderMaskLayer = LSET( { F_Mask, B_Mask } ).test( layer );
@ -1175,7 +1168,9 @@ void ODB_STEP_ENTITY::MakeLayerEntity()
if( pad->GetShape( PADSTACK::ALL_LAYERS ) != PAD_SHAPE::CUSTOM
&& ( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 ) )
{
continue;
}
elements[layer][pad->GetNetCode()].push_back( pad );
}

4
pcbnew/pcb_painter.cpp

@ -269,9 +269,13 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const BOARD_ITEM* aItem, int aLayer ) con
& aItem->GetLayerSet();
if( GetActiveLayer() == F_Mask && visibleLayers.test( F_Mask ) )
{
aLayer = F_Mask;
}
else if( GetActiveLayer() == B_Mask && visibleLayers.test( B_Mask ) )
{
aLayer = B_Mask;
}
else if( ( visibleLayers & LSET::AllCuMask() ).none() )
{
if( visibleLayers.any() )

2
pcbnew/pcb_shape.cpp

@ -945,7 +945,7 @@ static struct PCB_SHAPE_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

2
pcbnew/pcb_track.cpp

@ -2349,7 +2349,7 @@ static struct TRACK_VIA_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

2
pcbnew/pcbnew_jobs_handler.cpp

@ -379,7 +379,7 @@ LSEQ PCBNEW_JOBS_HANDLER::convertLayerArg( wxString& aLayerString, BOARD* aBoard
std::map<wxString, LSET> layerGuiMasks;
// Build list of layer names and their layer mask:
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
// Add user layer name
if( aBoard )

2
pcbnew/pcbnew_printout.cpp

@ -142,7 +142,7 @@ void PCBNEW_PRINTOUT::setupViewLayers( KIGFX::VIEW& aView, const LSET& aLayerSet
{
BOARD_PRINTOUT::setupViewLayers( aView, aLayerSet );
for( PCB_LAYER_ID layer : m_settings.m_LayerSet.Seq() )
for( PCB_LAYER_ID layer : m_settings.m_LayerSet )
{
aView.SetLayerVisible( PCBNEW_LAYER_ID_START + layer, true );

2
pcbnew/plot_board_layers.cpp

@ -697,7 +697,7 @@ void PlotStandardLayer( BOARD* aBoard, PLOTTER* aPlotter, const LSET& aLayerMask
int diameter = 0;
for( PCB_LAYER_ID layer : aLayerMask.Seq() )
for( PCB_LAYER_ID layer : aLayerMask )
diameter = std::max( diameter, via->GetWidth( layer ) );
diameter += 2 * via_margin + width_adj;

4
pcbnew/python/scripting/pcbnew_scripting_helpers.cpp

@ -227,7 +227,7 @@ BOARD* LoadBoard( const wxString& aFileName, PCB_IO_MGR::PCB_FILE_T aFormat, boo
layerEnum.Choices().Clear();
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
// Canonical name
layerEnum.Map( layer, LSET::Name( layer ) );
@ -587,7 +587,7 @@ bool WriteDRCReport( BOARD* aBoard, const wxString& aFileName, EDA_UNITS aUnits,
layerEnum.Choices().Clear();
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
{
layerEnum.Map( layer, LSET::Name( layer ) ); // Add Canonical name
layerEnum.Map( layer, aBoard->GetLayerName( layer ) ); // Add User name

2
pcbnew/router/pns_kicad_iface.cpp

@ -1655,7 +1655,7 @@ bool PNS_KICAD_IFACE::IsItemVisible( const PNS::ITEM* aItem ) const
if( m_view->IsVisible( item ) && isOnVisibleLayer )
{
for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : item->GetLayerSet() )
{
if( item->ViewGetLOD( layer, m_view ) < m_view->GetScale() )
return true;

4
pcbnew/tools/drawing_tool.cpp

@ -3553,7 +3553,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
return false;
}
for( PCB_LAYER_ID layer : aOther->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : aOther->GetLayerSet() )
{
// Reference images are "on" a copper layer but are not actually part of it
if( !IsCopperLayer( layer ) || aOther->Type() == PCB_REFERENCE_IMAGE_T )
@ -3815,7 +3815,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
for( ZONE* z : m_board->Zones() )
{
for( PCB_LAYER_ID layer : lset.Seq() )
for( PCB_LAYER_ID layer : lset )
{
if( z->IsOnLayer( layer ) )
{

7
pcbnew/tools/global_edit_tool.cpp

@ -107,13 +107,12 @@ int GLOBAL_EDIT_TOOL::ExchangeFootprints( const TOOL_EVENT& aEvent )
}
bool GLOBAL_EDIT_TOOL::swapBoardItem( BOARD_ITEM* aItem,
std::map<PCB_LAYER_ID, PCB_LAYER_ID>& aLayerMap )
bool GLOBAL_EDIT_TOOL::swapBoardItem( BOARD_ITEM* aItem, std::map<PCB_LAYER_ID, PCB_LAYER_ID>& aLayerMap )
{
LSET originalLayers = aItem->GetLayerSet();
LSET newLayers;
for( PCB_LAYER_ID original : originalLayers.Seq() )
for( PCB_LAYER_ID original : originalLayers )
{
if( aLayerMap.count( original ) )
newLayers.set( aLayerMap[ original ] );
@ -121,7 +120,7 @@ bool GLOBAL_EDIT_TOOL::swapBoardItem( BOARD_ITEM* aItem,
newLayers.set( original );
}
if( originalLayers.Seq() != newLayers.Seq() )
if( originalLayers != newLayers )
{
m_commit->Modify( aItem );
aItem->SetLayerSet( newLayers );

2
pcbnew/tools/pad_tool.cpp

@ -364,7 +364,7 @@ int PAD_TOOL::EnumeratePads( const TOOL_EVENT& aEvent )
if( !view->IsVisible( item ) )
return false;
for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : item->GetLayerSet() )
{
if( ( isHighContrast && activeLayers.count( layer ) ) || view->IsLayerVisible( layer ) )
{

2
pcbnew/tools/pcb_grid_helper.cpp

@ -1139,7 +1139,7 @@ void PCB_GRID_HELPER::computeAnchors( BOARD_ITEM* aItem, const VECTOR2I& aRefPos
bool onActiveLayer = !isHighContrast;
bool isLODVisible = false;
for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : item->GetLayerSet() )
{
if( !onActiveLayer && activeLayers.count( layer ) )
onActiveLayer = true;

8
pcbnew/tools/pcb_selection_tool.cpp

@ -2875,7 +2875,7 @@ bool PCB_SELECTION_TOOL::Selectable( const BOARD_ITEM* aItem, bool checkVisibili
{
LSET set;
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
set.set( layer, view()->IsLayerVisible( layer ) );
return set;
@ -3973,7 +3973,7 @@ void PCB_SELECTION_TOOL::FilterCollectorForFootprints( GENERAL_COLLECTOR& aColle
{
LSET set;
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
set.set( layer, view()->IsLayerVisible( layer ) );
return set;
@ -4020,7 +4020,7 @@ void PCB_SELECTION_TOOL::FilterCollectorForFootprints( GENERAL_COLLECTOR& aColle
bool has_hit = false;
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
if( fp->HitTestOnLayer( extents, false, layer ) )
{
@ -4046,7 +4046,7 @@ void PCB_SELECTION_TOOL::FilterCollectorForFootprints( GENERAL_COLLECTOR& aColle
{
has_hit = false;
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
if( fp->HitTestOnLayer( aWhere, layer ) )
{

2
pcbnew/zone.cpp

@ -1750,7 +1750,7 @@ static struct ZONE_DESC
{
layerEnum.Undefined( UNDEFINED_LAYER );
for( PCB_LAYER_ID layer : LSET::AllLayersMask().Seq() )
for( PCB_LAYER_ID layer : LSET::AllLayersMask() )
layerEnum.Map( layer, LSET::Name( layer ) );
}

10
pcbnew/zone_filler.cpp

@ -390,7 +390,7 @@ bool ZONE_FILLER::Fill( const std::vector<ZONE*>& aZones, bool aCheck, wxWindow*
return aZone->Outline()->Contains( center, -1, holeRadius );
};
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
if( !via->ConditionallyFlashed( layer ) )
continue;
@ -433,7 +433,7 @@ bool ZONE_FILLER::Fill( const std::vector<ZONE*>& aZones, bool aCheck, wxWindow*
return aZone->Outline()->Contains( center );
};
for( PCB_LAYER_ID layer : layers.Seq() )
for( PCB_LAYER_ID layer : layers )
{
if( !pad->ConditionallyFlashed( layer ) )
continue;
@ -470,7 +470,7 @@ bool ZONE_FILLER::Fill( const std::vector<ZONE*>& aZones, bool aCheck, wxWindow*
// calculate the hash value for filled areas. it will be used later to know if the
// current filled areas are up to date
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
zone->BuildHashValue( layer );
oldFillHashes[ { zone, layer } ] = zone->GetHashValue( layer );
@ -778,7 +778,7 @@ bool ZONE_FILLER::Fill( const std::vector<ZONE*>& aZones, bool aCheck, wxWindow*
// arbitrarily choose "at least 3X the area".
double minArea = (double) zone->GetMinThickness() * zone->GetMinThickness() * 3;
for( PCB_LAYER_ID layer : zoneCopperLayers.Seq() )
for( PCB_LAYER_ID layer : zoneCopperLayers )
{
if( m_debugZoneFiller && LSET::InternalCuMask().Contains( layer ) )
continue;
@ -878,7 +878,7 @@ bool ZONE_FILLER::Fill( const std::vector<ZONE*>& aZones, bool aCheck, wxWindow*
if( zone->GetIsRuleArea() )
continue;
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
for( PCB_LAYER_ID layer : zone->GetLayerSet() )
{
zone->BuildHashValue( layer );

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