From b9259f8516c617f0732ae89439ec7464fa160915 Mon Sep 17 00:00:00 2001 From: dickelbeck Date: Thu, 2 Aug 2007 02:04:45 +0000 Subject: [PATCH] fixed g++ 4.1.2 compiler warnings, added USE_MATCH_LAYER build option --- common/copy_to_clipboard.cpp | 4 +-- eeschema/plothpgl.cpp | 2 +- eeschema/plotps.cpp | 2 +- libs.linux | 6 ++++ pcbnew/class_module.h | 2 +- pcbnew/clean.cpp | 4 --- pcbnew/dragsegm.cpp | 1 - pcbnew/gen_modules_placefile.cpp | 2 +- pcbnew/hotkeys.cpp | 6 +++- pcbnew/locate.cpp | 62 ++++++++++++++++++++++---------- pcbnew/muonde.cpp | 5 +-- pcbnew/onrightclick.cpp | 2 +- pcbnew/zones.cpp | 4 +-- 13 files changed, 66 insertions(+), 36 deletions(-) diff --git a/common/copy_to_clipboard.cpp b/common/copy_to_clipboard.cpp index b0af12b12b..b0bbb5328f 100644 --- a/common/copy_to_clipboard.cpp +++ b/common/copy_to_clipboard.cpp @@ -25,8 +25,8 @@ extern BASE_SCREEN * ActiveScreen; -static bool s_PlotBlackAndWhite = FALSE; -static bool Print_Sheet_Ref = TRUE; +static const bool s_PlotBlackAndWhite = FALSE; +static const bool Print_Sheet_Ref = TRUE; static bool DrawPage(WinEDA_DrawPanel * panel); diff --git a/eeschema/plothpgl.cpp b/eeschema/plothpgl.cpp index f84237b81d..4ac1cecd67 100644 --- a/eeschema/plothpgl.cpp +++ b/eeschema/plothpgl.cpp @@ -501,7 +501,7 @@ int margin; /* Build the screen list */ EDA_ScreenList ScreenList(NULL); - if ( Select_PlotAll == TRUE ) screen = screen = ScreenList.GetFirst(); + if ( Select_PlotAll == TRUE ) screen = ScreenList.GetFirst(); else screen = ActiveScreen; for ( ; screen != NULL; screen = ScreenList.GetNext() ) { diff --git a/eeschema/plotps.cpp b/eeschema/plotps.cpp index 95ae47885f..0020b973e3 100644 --- a/eeschema/plotps.cpp +++ b/eeschema/plotps.cpp @@ -329,7 +329,7 @@ wxPoint plot_offset; /* Build the screen list */ EDA_ScreenList ScreenList(NULL); - if ( AllPages == TRUE ) screen = screen = ScreenList.GetFirst(); + if ( AllPages == TRUE ) screen = ScreenList.GetFirst(); else screen = ActiveScreen; for ( ; screen != NULL; screen = ScreenList.GetNext() ) { diff --git a/libs.linux b/libs.linux index 2cdb9d95c7..aa1d91e645 100644 --- a/libs.linux +++ b/libs.linux @@ -62,6 +62,12 @@ LDFLAGS = -s #-v endif +# a command line define which affects pcbnew only, causing it to match current layer +ifdef USE_MATCH_LAYER +CPPFLAGS += -DUSE_MATCH_LAYER +endif + + # You must comment or uncomment this line to disable/enable python support #KICAD_PYTHON = 1 diff --git a/pcbnew/class_module.h b/pcbnew/class_module.h index 90aafeb4b6..256b5ca26e 100644 --- a/pcbnew/class_module.h +++ b/pcbnew/class_module.h @@ -60,7 +60,7 @@ public: wxSize m_Ext; // marges de "garde": utilise en placement auto. float m_Surface; // surface du rectangle d'encadrement - long m_Link; // variable temporaire ( pour editions, ...) + unsigned long m_Link; // variable temporaire ( pour editions, ...) long m_LastEdit_Time; // Date de la derniere modification du module (gestion de librairies) wxString m_Doc; // Texte de description du module diff --git a/pcbnew/clean.cpp b/pcbnew/clean.cpp index 6ec5d8185b..8d02a50435 100644 --- a/pcbnew/clean.cpp +++ b/pcbnew/clean.cpp @@ -22,10 +22,6 @@ #define POS_AFF_NUMSEGM 70 /* Routines locales : */ -#if 0 -static void ConnectDanglingEndToPad(WinEDA_PcbFrame * frame); -static void Gen_Raccord_Track(WinEDA_PcbFrame * frame, wxDC * DC); -#endif static int clean_segments(WinEDA_PcbFrame * frame, wxDC * DC); static void suppression_piste_non_connectee(WinEDA_PcbFrame * frame, wxDC * DC); static TRACK * AlignSegment(BOARD * Pcb, TRACK * pt_ref, TRACK * pt_segm, int extremite); diff --git a/pcbnew/dragsegm.cpp b/pcbnew/dragsegm.cpp index 1fc7c3f212..c8aa7e465e 100644 --- a/pcbnew/dragsegm.cpp +++ b/pcbnew/dragsegm.cpp @@ -109,7 +109,6 @@ void Build_1_Pad_SegmentsToDrag(WinEDA_DrawPanel * panel, wxDC * DC, D_PAD * PtP */ { TRACK * Track; -DRAG_SEGM * pt_drag; int net_code = PtPad->m_NetCode; int MasqueLayer; wxPoint pos; diff --git a/pcbnew/gen_modules_placefile.cpp b/pcbnew/gen_modules_placefile.cpp index 89d1ac4c62..276e41f1e9 100644 --- a/pcbnew/gen_modules_placefile.cpp +++ b/pcbnew/gen_modules_placefile.cpp @@ -342,7 +342,7 @@ char *layer_name[4] = {"??? ","copper","component","all"} ; fprintf( rptfile,"$EndPAD\n"); } - fprintf( rptfile,"$EndMODULE %s\n\n", Module->m_Reference->m_Text.GetData()); + fprintf( rptfile,"$EndMODULE %s\n\n", (const char*) Module->m_Reference->m_Text.GetData() ); } /* Write board Edges */ diff --git a/pcbnew/hotkeys.cpp b/pcbnew/hotkeys.cpp index 30d4056649..c2bf2e8d5a 100644 --- a/pcbnew/hotkeys.cpp +++ b/pcbnew/hotkeys.cpp @@ -147,7 +147,11 @@ sous le courseur souris if ( ItemFree ) { module = Locate_Prefered_Module(m_Pcb, - CURSEUR_OFF_GRILLE | IGNORE_LOCKED | VISIBLE_ONLY /*MATCH_LAYER */ ); + CURSEUR_OFF_GRILLE | IGNORE_LOCKED | VISIBLE_ONLY +#if defined(USE_MATCH_LAYER) + | MATCH_LAYER +#endif + ); if ( module == NULL ) // no footprint found { module = Locate_Prefered_Module(m_Pcb, CURSEUR_OFF_GRILLE ); diff --git a/pcbnew/locate.cpp b/pcbnew/locate.cpp index dd6e5bc38d..331e254403 100644 --- a/pcbnew/locate.cpp +++ b/pcbnew/locate.cpp @@ -117,19 +117,25 @@ EDA_BaseStruct * item; return pt_texte_pcb; } - if ( (DrawSegm = Locate_Segment_Pcb(m_Pcb, LayerSearch, typeloc)) != NULL) + DrawSegm = Locate_Segment_Pcb(m_Pcb, LayerSearch, typeloc); + if( DrawSegm != NULL ) { Affiche_Infos_DrawSegment(this, DrawSegm); return DrawSegm; } - if ( (item = Locate_Cotation(m_Pcb, LayerSearch, typeloc)) != NULL) return item; + item = Locate_Cotation(m_Pcb, LayerSearch, typeloc); + if( item != NULL ) + return item; - if ( (item = Locate_MirePcb(m_Pcb->m_Drawings, LayerSearch, typeloc)) != NULL) return item; + item = Locate_MirePcb(m_Pcb->m_Drawings, LayerSearch, typeloc); + if( item != NULL ) + return item; /* Search for tracks and vias, with via priority */ if ( LayerSearch == -1 ) masque_layer = ALL_LAYERS; else masque_layer = g_TabOneLayerMask[LayerSearch]; + Track = Locate_Pistes( m_Pcb->m_Track, masque_layer,typeloc ); if ( Track != NULL ) { @@ -146,7 +152,6 @@ EDA_BaseStruct * item; return Track; } - /* Search for Pads */ if( (pt_pad = Locate_Any_Pad(m_Pcb, typeloc)) != NULL ) { @@ -157,13 +162,16 @@ EDA_BaseStruct * item; // First search: locate texts for footprints on copper or component layer // Priority to the active layer (component or copper. // this is useful for small smd components when 2 texts overlap but are not on the same layer - if ( (LayerSearch == LAYER_CUIVRE_N) || (LayerSearch == CMP_N )) + if( LayerSearch == LAYER_CUIVRE_N || LayerSearch == CMP_N ) { - for (module = m_Pcb->m_Modules; module != NULL; module = (MODULE*)module->Pnext) + for( module = m_Pcb->m_Modules; module != NULL; module = (MODULE*)module->Pnext ) { - TEXTE_MODULE * pt_texte; - if ( module->m_Layer != LayerSearch) continue; - pt_texte = LocateTexteModule(m_Pcb, &module, typeloc | VISIBLE_ONLY); + TEXTE_MODULE * pt_texte; + + if( module->m_Layer != LayerSearch ) + continue; + + pt_texte = LocateTexteModule( m_Pcb, &module, typeloc | VISIBLE_ONLY ); if( pt_texte != NULL ) { Affiche_Infos_E_Texte(this, module, pt_texte); @@ -175,8 +183,8 @@ EDA_BaseStruct * item; // Now Search footprint texts on all layers module = NULL; { - TEXTE_MODULE * pt_texte; - pt_texte = LocateTexteModule(m_Pcb, &module, typeloc | VISIBLE_ONLY); + TEXTE_MODULE * pt_texte; + pt_texte = LocateTexteModule(m_Pcb, &module, typeloc | VISIBLE_ONLY ); if( pt_texte != NULL ) { Affiche_Infos_E_Texte(this, module, pt_texte); @@ -185,7 +193,8 @@ EDA_BaseStruct * item; } /* Search for a footprint */ - if ( (module = Locate_Prefered_Module(m_Pcb, typeloc | VISIBLE_ONLY)) != NULL) + module = Locate_Prefered_Module( m_Pcb, typeloc | VISIBLE_ONLY ); + if( module != NULL ) { module->Display_Infos(this); return module; @@ -195,7 +204,8 @@ EDA_BaseStruct * item; if( (TrackLocate = Locate_Zone((TRACK*)m_Pcb->m_Zone, GetScreen()->m_Active_Layer,typeloc)) != NULL ) { - Affiche_Infos_Piste(this, TrackLocate) ; return TrackLocate; + Affiche_Infos_Piste(this, TrackLocate); + return TrackLocate; } MsgPanel->EraseMsgBox(); @@ -757,21 +767,35 @@ wxPoint ref_pos; for( ; module != NULL; module = (MODULE*)module->Pnext ) { - if ( (typeloc & VISIBLE_ONLY) ) + int layer = module->m_Layer; + if( layer==ADHESIVE_N_CU || layer==SILKSCREEN_N_CU ) + layer = CUIVRE_N; + else if( layer==ADHESIVE_N_CMP || layer==SILKSCREEN_N_CMP ) + layer = CMP_N; + + if( typeloc & VISIBLE_ONLY ) { - int layer = module->m_Layer; - if( layer==ADHESIVE_N_CU || layer==SILKSCREEN_N_CU ) layer = CUIVRE_N; - else if( layer==ADHESIVE_N_CMP || layer==SILKSCREEN_N_CMP ) layer = CMP_N; - if ( ! IsModuleLayerVisible( layer ) ) continue; + if( !IsModuleLayerVisible( layer ) ) + continue; } - pt_txt_mod = module->m_Reference; + + if( typeloc & MATCH_LAYER ) + { + if( ((PCB_SCREEN*)ActiveScreen)->m_Active_Layer != layer ) + continue; + } + + pt_txt_mod = module->m_Reference; + /* la souris est-elle dans le rectangle autour du texte*/ if( pt_txt_mod->Locate(ref_pos) ) { if( PtModule) *PtModule = module; return(pt_txt_mod); } + pt_txt_mod = module->m_Value; + /* la souris est-elle dans le rectangle autour du texte*/ if( pt_txt_mod->Locate(ref_pos) ) { diff --git a/pcbnew/muonde.cpp b/pcbnew/muonde.cpp index d46aa53cf0..b10a34b429 100644 --- a/pcbnew/muonde.cpp +++ b/pcbnew/muonde.cpp @@ -20,7 +20,7 @@ /* fonctions importees */ /* Fonctions locales */ -static void Exit_Muonde(WinEDA_DrawFrame * frame, wxDC *DC); +//static void Exit_Muonde(WinEDA_DrawFrame * frame, wxDC *DC); /* Variables locales : */ #define COEFF_COUNT 6 @@ -87,7 +87,7 @@ wxString Line; } - +#if 0 /**********************************************************/ static void Exit_Muonde(WinEDA_DrawFrame * frame, wxDC *DC ) /**********************************************************/ @@ -111,6 +111,7 @@ MODULE * Module = (MODULE*) frame->m_CurrentScreen->m_CurrentItem; frame->DrawPanel->ForceCloseManageCurseur = NULL; frame->m_CurrentScreen->m_CurrentItem = NULL; } +#endif /***************************************************************************/ diff --git a/pcbnew/onrightclick.cpp b/pcbnew/onrightclick.cpp index d206f4c32c..7995a8ab22 100644 --- a/pcbnew/onrightclick.cpp +++ b/pcbnew/onrightclick.cpp @@ -25,7 +25,7 @@ #include "Delete_Line.xpm" #include "Delete_Track.xpm" #include "Move_Module.xpm" -#include "Move_Track_Segment.xpm" +//#include "Move_Track_Segment.xpm" #include "Drag_Track_Segment.xpm" #include "Drag_Segment_WithSlope.xpm" #include "Drag_Module.xpm" diff --git a/pcbnew/zones.cpp b/pcbnew/zones.cpp index fbc4d36d10..9285799c9a 100644 --- a/pcbnew/zones.cpp +++ b/pcbnew/zones.cpp @@ -202,7 +202,7 @@ wxString title = _("Zone clearance value:") + ReturnUnitSymbol(g_UnitMetric); if ( Zone_45_Only ) m_OrientEdgesOpt->SetSelection(1); int GridList[4] = { 50,100,250,500}, selection = 0; - for ( int ii = 0; ii < m_GridCtrl->GetCount(); ii++ ) + for ( unsigned ii = 0; ii < m_GridCtrl->GetCount(); ii++ ) { wxString msg = ReturnStringFromValue(g_UnitMetric, GridList[ii], m_Parent->m_InternalUnits); m_GridCtrl->SetString(ii,msg); @@ -857,7 +857,7 @@ wxString msg; if( (cell & CELL_is_ZONE) ) { if ( (cell & CELL_is_FRIEND) == 0) - AndCell(ii,jj,BOTTOM, ~(CELL_is_FRIEND|CELL_is_ZONE) ); + AndCell(ii,jj,BOTTOM, (BoardCell) ~(CELL_is_FRIEND|CELL_is_ZONE) ); } } }