diff --git a/pcbnew/board_connected_item.cpp b/pcbnew/board_connected_item.cpp index 4a207420d1..94fdd45da2 100644 --- a/pcbnew/board_connected_item.cpp +++ b/pcbnew/board_connected_item.cpp @@ -85,8 +85,8 @@ int BOARD_CONNECTED_ITEM::GetOwnClearance( PCB_LAYER_ID aLayer, wxString* aSourc { BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings(); - constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, this, - nullptr, aLayer ); + constraint = bds.m_DRCEngine->EvalRulesForItems( CLEARANCE_CONSTRAINT, this, nullptr, + aLayer ); } if( constraint.Value().HasMin() ) diff --git a/pcbnew/board_design_settings.cpp b/pcbnew/board_design_settings.cpp index a437e69daf..2f9e02d71b 100644 --- a/pcbnew/board_design_settings.cpp +++ b/pcbnew/board_design_settings.cpp @@ -849,10 +849,7 @@ int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue() DRC_CONSTRAINT constraint; if( m_DRCEngine ) - { - m_DRCEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_CLEARANCE, constraint, - DRCCQ_LARGEST_MINIMUM ); - } + m_DRCEngine->QueryWorstConstraint( CLEARANCE_CONSTRAINT, constraint ); return constraint.Value().HasMin() ? constraint.Value().Min() : 0; } diff --git a/pcbnew/class_track.cpp b/pcbnew/class_track.cpp index 492153b54c..e4ad4a4ef8 100644 --- a/pcbnew/class_track.cpp +++ b/pcbnew/class_track.cpp @@ -117,8 +117,8 @@ void TRACK::GetWidthConstraints( int* aMin, int* aMax, wxString* aSource ) const { BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings(); - constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_TRACK_WIDTH, this, - nullptr, GetLayer() ); + constraint = bds.m_DRCEngine->EvalRulesForItems( TRACK_WIDTH_CONSTRAINT, this, nullptr, + GetLayer() ); } if( constraint.Value().HasMin() || constraint.Value().HasMax() ) @@ -151,8 +151,8 @@ int VIA::GetMinAnnulus( PCB_LAYER_ID aLayer, wxString* aSource ) const { BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings(); - constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, this, - nullptr, aLayer ); + constraint = bds.m_DRCEngine->EvalRulesForItems( ANNULAR_WIDTH_CONSTRAINT, this, nullptr, + aLayer ); } if( constraint.Value().HasMin() ) diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp index 05dc2fb70c..30077f3f52 100644 --- a/pcbnew/drc/drc_engine.cpp +++ b/pcbnew/drc/drc_engine.cpp @@ -123,45 +123,45 @@ void DRC_ENGINE::loadImplicitRules() DRC_RULE* rule = createImplicitRule( _( "board setup constraints" ) ); - DRC_CONSTRAINT clearanceConstraint( DRC_CONSTRAINT_TYPE_CLEARANCE ); + DRC_CONSTRAINT clearanceConstraint( CLEARANCE_CONSTRAINT ); clearanceConstraint.Value().SetMin( bds.m_MinClearance ); rule->AddConstraint( clearanceConstraint ); - DRC_CONSTRAINT widthConstraint( DRC_CONSTRAINT_TYPE_TRACK_WIDTH ); + DRC_CONSTRAINT widthConstraint( TRACK_WIDTH_CONSTRAINT ); widthConstraint.Value().SetMin( bds.m_TrackMinWidth ); rule->AddConstraint( widthConstraint ); - DRC_CONSTRAINT drillConstraint( DRC_CONSTRAINT_TYPE_HOLE_SIZE ); + DRC_CONSTRAINT drillConstraint( HOLE_SIZE_CONSTRAINT ); drillConstraint.Value().SetMin( bds.m_MinThroughDrill ); rule->AddConstraint( drillConstraint ); - DRC_CONSTRAINT annulusConstraint( DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH ); + DRC_CONSTRAINT annulusConstraint( ANNULAR_WIDTH_CONSTRAINT ); annulusConstraint.Value().SetMin( bds.m_ViasMinAnnulus ); rule->AddConstraint( annulusConstraint ); - DRC_CONSTRAINT diameterConstraint( DRC_CONSTRAINT_TYPE_VIA_DIAMETER ); + DRC_CONSTRAINT diameterConstraint( VIA_DIAMETER_CONSTRAINT ); diameterConstraint.Value().SetMin( bds.m_ViasMinSize ); rule->AddConstraint( diameterConstraint ); - DRC_CONSTRAINT edgeClearanceConstraint( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE ); + DRC_CONSTRAINT edgeClearanceConstraint( EDGE_CLEARANCE_CONSTRAINT ); edgeClearanceConstraint.Value().SetMin( bds.m_CopperEdgeClearance ); rule->AddConstraint( edgeClearanceConstraint ); - DRC_CONSTRAINT holeClearanceConstraint( DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE ); + DRC_CONSTRAINT holeClearanceConstraint( HOLE_CLEARANCE_CONSTRAINT ); holeClearanceConstraint.Value().SetMin( bds.m_HoleToHoleMin ); rule->AddConstraint( holeClearanceConstraint ); - DRC_CONSTRAINT courtyardClearanceConstraint( DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE ); + DRC_CONSTRAINT courtyardClearanceConstraint( COURTYARD_CLEARANCE_CONSTRAINT ); holeClearanceConstraint.Value().SetMin( 0 ); rule->AddConstraint( courtyardClearanceConstraint ); - DRC_CONSTRAINT diffPairGapConstraint( DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP ); + DRC_CONSTRAINT diffPairGapConstraint( DIFF_PAIR_GAP_CONSTRAINT ); diffPairGapConstraint.Value().SetMin( bds.GetDefault()->GetClearance() ); rule->AddConstraint( diffPairGapConstraint ); rule = createImplicitRule( _( "board setup constraints" ) ); rule->m_LayerCondition = LSET( 2, F_SilkS, B_SilkS ); - DRC_CONSTRAINT silkClearanceConstraint( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE ); + DRC_CONSTRAINT silkClearanceConstraint( SILK_CLEARANCE_CONSTRAINT ); silkClearanceConstraint.Value().SetMin( bds.m_SilkClearance ); rule->AddConstraint( silkClearanceConstraint ); @@ -172,17 +172,17 @@ void DRC_ENGINE::loadImplicitRules() uViaRule->m_Condition = new DRC_RULE_CONDITION( "A.Via_Type == 'Micro'" ); - DRC_CONSTRAINT uViaDrillConstraint( DRC_CONSTRAINT_TYPE_HOLE_SIZE ); + DRC_CONSTRAINT uViaDrillConstraint( HOLE_SIZE_CONSTRAINT ); uViaDrillConstraint.Value().SetMin( bds.m_MicroViasMinDrill ); uViaRule->AddConstraint( uViaDrillConstraint ); - DRC_CONSTRAINT uViaDiameterConstraint( DRC_CONSTRAINT_TYPE_VIA_DIAMETER ); + DRC_CONSTRAINT uViaDiameterConstraint( VIA_DIAMETER_CONSTRAINT ); uViaDiameterConstraint.Value().SetMin( bds.m_MicroViasMinSize ); uViaRule->AddConstraint( uViaDiameterConstraint ); if( !bds.m_MicroViasAllowed ) { - DRC_CONSTRAINT disallowConstraint( DRC_CONSTRAINT_TYPE_DISALLOW ); + DRC_CONSTRAINT disallowConstraint( DISALLOW_CONSTRAINT ); disallowConstraint.m_DisallowFlags = DRC_DISALLOW_MICRO_VIAS; uViaRule->AddConstraint( disallowConstraint ); } @@ -193,7 +193,7 @@ void DRC_ENGINE::loadImplicitRules() bbViaRule->m_Condition = new DRC_RULE_CONDITION( "A.Via_Type == 'Blind/buried'" ); - DRC_CONSTRAINT disallowConstraint( DRC_CONSTRAINT_TYPE_DISALLOW ); + DRC_CONSTRAINT disallowConstraint( DISALLOW_CONSTRAINT ); disallowConstraint.m_DisallowFlags = DRC_DISALLOW_BB_VIAS; bbViaRule->AddConstraint( disallowConstraint ); } @@ -224,14 +224,14 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetClearance() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_CLEARANCE ); + DRC_CONSTRAINT constraint( CLEARANCE_CONSTRAINT ); constraint.Value().SetMin( std::max( bds.m_MinClearance, nc->GetClearance() ) ); rule->AddConstraint( constraint ); } if( nc->GetTrackWidth() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_TRACK_WIDTH ); + DRC_CONSTRAINT constraint( TRACK_WIDTH_CONSTRAINT ); constraint.Value().SetMin( bds.m_TrackMinWidth ); constraint.Value().SetOpt( nc->GetTrackWidth() ); rule->AddConstraint( constraint ); @@ -251,7 +251,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetDiffPairWidth() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_TRACK_WIDTH ); + DRC_CONSTRAINT constraint( TRACK_WIDTH_CONSTRAINT ); constraint.Value().SetMin( bds.m_TrackMinWidth ); constraint.Value().SetOpt( nc->GetDiffPairWidth() ); rule->AddConstraint( constraint ); @@ -259,7 +259,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetDiffPairGap() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP ); + DRC_CONSTRAINT constraint( DIFF_PAIR_GAP_CONSTRAINT ); constraint.Value().SetMin( std::max( bds.m_MinClearance, nc->GetClearance() ) ); constraint.Value().SetOpt( nc->GetDiffPairGap() ); rule->AddConstraint( constraint ); @@ -279,7 +279,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetViaDiameter() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_VIA_DIAMETER ); + DRC_CONSTRAINT constraint( VIA_DIAMETER_CONSTRAINT ); constraint.Value().SetMin( bds.m_ViasMinSize ); constraint.Value().SetOpt( nc->GetViaDiameter() ); rule->AddConstraint( constraint ); @@ -287,7 +287,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetViaDrill() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_HOLE_SIZE ); + DRC_CONSTRAINT constraint( HOLE_SIZE_CONSTRAINT ); constraint.Value().SetMin( bds.m_MinThroughDrill ); constraint.Value().SetOpt( nc->GetViaDrill() ); rule->AddConstraint( constraint ); @@ -307,7 +307,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetuViaDiameter() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_VIA_DIAMETER ); + DRC_CONSTRAINT constraint( VIA_DIAMETER_CONSTRAINT ); constraint.Value().SetMin( bds.m_MicroViasMinSize ); constraint.Value().SetMin( nc->GetuViaDiameter() ); rule->AddConstraint( constraint ); @@ -315,7 +315,7 @@ void DRC_ENGINE::loadImplicitRules() if( nc->GetuViaDrill() ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_HOLE_SIZE ); + DRC_CONSTRAINT constraint( HOLE_SIZE_CONSTRAINT ); constraint.Value().SetMin( bds.m_MicroViasMinDrill ); constraint.Value().SetOpt( nc->GetuViaDrill() ); rule->AddConstraint( constraint ); @@ -352,7 +352,7 @@ void DRC_ENGINE::loadImplicitRules() auto addKeepoutConstraint = [&rule]( int aConstraint ) { - DRC_CONSTRAINT disallowConstraint( DRC_CONSTRAINT_TYPE_DISALLOW ); + DRC_CONSTRAINT disallowConstraint( DISALLOW_CONSTRAINT ); disallowConstraint.m_DisallowFlags = aConstraint; rule->AddConstraint( disallowConstraint ); }; @@ -440,20 +440,19 @@ static wxString formatConstraint( const DRC_CONSTRAINT& constraint ) std::vector formats = { - { DRC_CONSTRAINT_TYPE_UNKNOWN, "unknown", nullptr }, - { DRC_CONSTRAINT_TYPE_CLEARANCE, "clearance", formatMinMax }, - { DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE, "hole_clearance", formatMinMax }, - { DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, "edge_clearance", formatMinMax }, - { DRC_CONSTRAINT_TYPE_HOLE_SIZE, "hole_size", formatMinMax }, - { DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE, "courtyard_clearance", formatMinMax }, - { DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, "silk_clearance", formatMinMax }, - { DRC_CONSTRAINT_TYPE_TRACK_WIDTH, "track_width", formatMinMax }, - { DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, "annular_width", formatMinMax }, - { DRC_CONSTRAINT_TYPE_DISALLOW, "disallow", nullptr }, - { DRC_CONSTRAINT_TYPE_VIA_DIAMETER, "via_diameter", formatMinMax }, - { DRC_CONSTRAINT_TYPE_LENGTH, "length", formatMinMax }, - { DRC_CONSTRAINT_TYPE_SKEW, "skew", formatMinMax }, - { DRC_CONSTRAINT_TYPE_VIA_COUNT, "via_count", formatMinMax } + { CLEARANCE_CONSTRAINT, "clearance", formatMinMax }, + { HOLE_CLEARANCE_CONSTRAINT, "hole_clearance", formatMinMax }, + { EDGE_CLEARANCE_CONSTRAINT, "edge_clearance", formatMinMax }, + { HOLE_SIZE_CONSTRAINT, "hole_size", formatMinMax }, + { COURTYARD_CLEARANCE_CONSTRAINT, "courtyard_clearance", formatMinMax }, + { SILK_CLEARANCE_CONSTRAINT, "silk_clearance", formatMinMax }, + { TRACK_WIDTH_CONSTRAINT, "track_width", formatMinMax }, + { ANNULAR_WIDTH_CONSTRAINT, "annular_width", formatMinMax }, + { DISALLOW_CONSTRAINT, "disallow", nullptr }, + { VIA_DIAMETER_CONSTRAINT, "via_diameter", formatMinMax }, + { LENGTH_CONSTRAINT, "length", formatMinMax }, + { SKEW_CONSTRAINT, "skew", formatMinMax }, + { VIA_COUNT_CONSTRAINT, "via_count", formatMinMax } }; for( auto& fmt : formats ) @@ -694,7 +693,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI * kills performance when running bulk DRC tests (where aReporter is nullptr). */ - if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE ) + if( aConstraintId == CLEARANCE_CONSTRAINT ) { // A PTH pad has a plated cylinder around the hole so copper clearances apply // whether or not there's a flashed pad. Not true for NPTHs. @@ -703,7 +702,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI const D_PAD* pad = static_cast( a ); if( pad->GetAttribute() == PAD_ATTRIB_NPTH && !pad->FlashLayer( aLayer ) ) - aConstraintId = DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE; + aConstraintId = HOLE_CLEARANCE_CONSTRAINT; } } @@ -713,7 +712,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI bool implicit = false; // Local overrides take precedence - if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE ) + if( aConstraintId == CLEARANCE_CONSTRAINT ) { int overrideA = 0; int overrideB = 0; @@ -740,7 +739,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI if( overrideA || overrideB ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_CLEARANCE, m_msg ); + DRC_CONSTRAINT constraint( CLEARANCE_CONSTRAINT, m_msg ); constraint.m_Value.SetMin( std::max( overrideA, overrideB ) ); return constraint; } @@ -753,35 +752,35 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI REPORT( "" ) - if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE ) + if( aConstraintId == CLEARANCE_CONSTRAINT ) { int clearance = c->constraint.m_Value.Min(); REPORT( wxString::Format( _( "Checking %s; clearance: %s." ), c->constraint.GetName(), MessageTextFromValue( UNITS, clearance ) ) ) } - else if( aConstraintId == DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE ) + else if( aConstraintId == COURTYARD_CLEARANCE_CONSTRAINT ) { int clearance = c->constraint.m_Value.Min(); REPORT( wxString::Format( _( "Checking %s; courtyard clearance: %s." ), c->constraint.GetName(), MessageTextFromValue( UNITS, clearance ) ) ) } - else if( aConstraintId == DRC_CONSTRAINT_TYPE_SILK_CLEARANCE ) + else if( aConstraintId == SILK_CLEARANCE_CONSTRAINT ) { int clearance = c->constraint.m_Value.Min(); REPORT( wxString::Format( _( "Checking %s; silk clearance: %s." ), c->constraint.GetName(), MessageTextFromValue( UNITS, clearance ) ) ) } - else if( aConstraintId == DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE ) + else if( aConstraintId == HOLE_CLEARANCE_CONSTRAINT ) { int clearance = c->constraint.m_Value.Min(); REPORT( wxString::Format( _( "Checking %s; hole clearance: %s." ), c->constraint.GetName(), MessageTextFromValue( UNITS, clearance ) ) ) } - else if( aConstraintId == DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE ) + else if( aConstraintId == EDGE_CLEARANCE_CONSTRAINT ) { int clearance = c->constraint.m_Value.Min(); REPORT( wxString::Format( _( "Checking %s; edge clearance: %s." ), @@ -793,7 +792,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI REPORT( wxString::Format( _( "Checking %s." ), c->constraint.GetName() ) ) } - if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE ) + if( aConstraintId == CLEARANCE_CONSTRAINT ) { if( implicit && ( isKeepoutZone( a ) || isKeepoutZone( b ) ) ) { @@ -801,7 +800,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI return true; } } - else if( aConstraintId == DRC_CONSTRAINT_TYPE_DISALLOW ) + else if( aConstraintId == DISALLOW_CONSTRAINT ) { int mask; @@ -954,7 +953,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI // Unfortunately implicit rules don't work for local clearances (such as zones) because // they have to be max'ed with netclass values (which are already implicit rules), and our // rule selection paradigm is "winner takes all". - if( constraintRef && aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE && implicit ) + if( constraintRef && aConstraintId == CLEARANCE_CONSTRAINT && implicit ) { int global = constraintRef->m_Value.Min(); int localA = connectedA ? connectedA->GetLocalClearance( nullptr ) : 0; @@ -985,7 +984,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI if( localA > global || localB > global ) { - DRC_CONSTRAINT constraint( DRC_CONSTRAINT_TYPE_CLEARANCE, m_msg ); + DRC_CONSTRAINT constraint( CLEARANCE_CONSTRAINT, m_msg ); constraint.m_Value.SetMin( clearance ); return constraint; } @@ -993,7 +992,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI // fixme: return optional, let the particular test decide what to do if no matching constraint // is found - static DRC_CONSTRAINT nullConstraint( DRC_CONSTRAINT_TYPE_NULL ); + static DRC_CONSTRAINT nullConstraint( NULL_CONSTRAINT ); nullConstraint.m_DisallowFlags = 0; return constraintRef ? *constraintRef : nullConstraint; @@ -1114,31 +1113,25 @@ bool DRC_ENGINE::HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_T constraintID ) bool DRC_ENGINE::QueryWorstConstraint( DRC_CONSTRAINT_TYPE_T aConstraintId, - DRC_CONSTRAINT& aConstraint, - DRC_CONSTRAINT_QUERY_T aQueryType ) + DRC_CONSTRAINT& aConstraint ) { - if( aQueryType == DRCCQ_LARGEST_MINIMUM ) - { - int worst = 0; + int worst = 0; - for( const DRC_CONSTRAINT& constraint : QueryConstraintsById( aConstraintId ) ) + for( const DRC_CONSTRAINT& constraint : QueryConstraintsById( aConstraintId ) ) + { + if( constraint.GetValue().HasMin() ) { - if( constraint.GetValue().HasMin() ) - { - int current = constraint.GetValue().Min(); + int current = constraint.GetValue().Min(); - if( current > worst ) - { - worst = current; - aConstraint = constraint; - } + if( current > worst ) + { + worst = current; + aConstraint = constraint; } } - - return worst > 0; } - return false; + return worst > 0; } diff --git a/pcbnew/drc/drc_engine.h b/pcbnew/drc/drc_engine.h index e0b3400a84..b9aeca1913 100644 --- a/pcbnew/drc/drc_engine.h +++ b/pcbnew/drc/drc_engine.h @@ -61,11 +61,6 @@ class DRC_ITEM; class DRC_RULE; class DRC_CONSTRAINT; -enum DRC_CONSTRAINT_QUERY_T -{ - DRCCQ_LARGEST_MINIMUM = 0 - // fixme: more to come I guess... -}; typedef std::function& aItem, wxPoint aPos )> DRC_VIOLATION_HANDLER; @@ -166,8 +161,7 @@ public: bool ReportPhase( const wxString& aMessage ); void ReportAux( const wxString& aStr ); - bool QueryWorstConstraint( DRC_CONSTRAINT_TYPE_T aRuleId, DRC_CONSTRAINT& aConstraint, - DRC_CONSTRAINT_QUERY_T aQueryType ); + bool QueryWorstConstraint( DRC_CONSTRAINT_TYPE_T aRuleId, DRC_CONSTRAINT& aConstraint ); std::vector GetTestProviders() const { return m_testProviders; }; diff --git a/pcbnew/drc/drc_rule.h b/pcbnew/drc/drc_rule.h index bba852a11b..aa236d7ad8 100644 --- a/pcbnew/drc/drc_rule.h +++ b/pcbnew/drc/drc_rule.h @@ -40,24 +40,23 @@ class DRC_RULE_CONDITION; enum DRC_CONSTRAINT_TYPE_T { - DRC_CONSTRAINT_TYPE_UNKNOWN = -1, - DRC_CONSTRAINT_TYPE_NULL = 0, - DRC_CONSTRAINT_TYPE_CLEARANCE, - DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE, - DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, - DRC_CONSTRAINT_TYPE_HOLE_SIZE, - DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE, - DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, - DRC_CONSTRAINT_TYPE_TRACK_WIDTH, - DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, - DRC_CONSTRAINT_TYPE_DISALLOW, - DRC_CONSTRAINT_TYPE_VIA_DIAMETER, - DRC_CONSTRAINT_TYPE_LENGTH, - DRC_CONSTRAINT_TYPE_SKEW, - DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP, - DRC_CONSTRAINT_TYPE_DIFF_PAIR_MAX_UNCOUPLED, - DRC_CONSTRAINT_TYPE_DIFF_PAIR_INTRA_SKEW, - DRC_CONSTRAINT_TYPE_VIA_COUNT + NULL_CONSTRAINT = 0, + CLEARANCE_CONSTRAINT, + HOLE_CLEARANCE_CONSTRAINT, + EDGE_CLEARANCE_CONSTRAINT, + HOLE_SIZE_CONSTRAINT, + COURTYARD_CLEARANCE_CONSTRAINT, + SILK_CLEARANCE_CONSTRAINT, + TRACK_WIDTH_CONSTRAINT, + ANNULAR_WIDTH_CONSTRAINT, + DISALLOW_CONSTRAINT, + VIA_DIAMETER_CONSTRAINT, + LENGTH_CONSTRAINT, + SKEW_CONSTRAINT, + DIFF_PAIR_GAP_CONSTRAINT, + DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT, + DIFF_PAIR_INTRA_SKEW_CONSTRAINT, + VIA_COUNT_CONSTRAINT }; @@ -104,7 +103,7 @@ public: class DRC_CONSTRAINT { public: - DRC_CONSTRAINT( DRC_CONSTRAINT_TYPE_T aType = DRC_CONSTRAINT_TYPE_UNKNOWN, + DRC_CONSTRAINT( DRC_CONSTRAINT_TYPE_T aType = NULL_CONSTRAINT, const wxString& aName = wxEmptyString ) : m_Type( aType ), m_DisallowFlags( 0 ), @@ -115,7 +114,7 @@ class DRC_CONSTRAINT bool IsNull() const { - return m_Type == DRC_CONSTRAINT_TYPE_NULL; + return m_Type == NULL_CONSTRAINT; } const MINOPTMAX& GetValue() const { return m_Value; } diff --git a/pcbnew/drc/drc_rule_parser.cpp b/pcbnew/drc/drc_rule_parser.cpp index 332a7ca57a..aaeea65c2f 100644 --- a/pcbnew/drc/drc_rule_parser.cpp +++ b/pcbnew/drc/drc_rule_parser.cpp @@ -271,20 +271,20 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule ) switch( token ) { - case T_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_CLEARANCE; break; - case T_hole_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE; break; - case T_edge_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE; break; - case T_hole: constraint.m_Type = DRC_CONSTRAINT_TYPE_HOLE_SIZE; break; - case T_courtyard_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE; break; - case T_silk_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_SILK_CLEARANCE; break; - case T_track_width: constraint.m_Type = DRC_CONSTRAINT_TYPE_TRACK_WIDTH; break; - case T_annular_width: constraint.m_Type = DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH; break; - case T_disallow: constraint.m_Type = DRC_CONSTRAINT_TYPE_DISALLOW; break; - case T_length: constraint.m_Type = DRC_CONSTRAINT_TYPE_LENGTH; break; - case T_skew: constraint.m_Type = DRC_CONSTRAINT_TYPE_SKEW; break; - case T_via_count: constraint.m_Type = DRC_CONSTRAINT_TYPE_VIA_COUNT; break; - case T_diff_pair_gap: constraint.m_Type = DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP; break; - case T_diff_pair_uncoupled: constraint.m_Type = DRC_CONSTRAINT_TYPE_DIFF_PAIR_MAX_UNCOUPLED; break; + case T_clearance: constraint.m_Type = CLEARANCE_CONSTRAINT; break; + case T_hole_clearance: constraint.m_Type = HOLE_CLEARANCE_CONSTRAINT; break; + case T_edge_clearance: constraint.m_Type = EDGE_CLEARANCE_CONSTRAINT; break; + case T_hole: constraint.m_Type = HOLE_SIZE_CONSTRAINT; break; + case T_courtyard_clearance: constraint.m_Type = COURTYARD_CLEARANCE_CONSTRAINT; break; + case T_silk_clearance: constraint.m_Type = SILK_CLEARANCE_CONSTRAINT; break; + case T_track_width: constraint.m_Type = TRACK_WIDTH_CONSTRAINT; break; + case T_annular_width: constraint.m_Type = ANNULAR_WIDTH_CONSTRAINT; break; + case T_disallow: constraint.m_Type = DISALLOW_CONSTRAINT; break; + case T_length: constraint.m_Type = LENGTH_CONSTRAINT; break; + case T_skew: constraint.m_Type = SKEW_CONSTRAINT; break; + case T_via_count: constraint.m_Type = VIA_COUNT_CONSTRAINT; break; + case T_diff_pair_gap: constraint.m_Type = DIFF_PAIR_GAP_CONSTRAINT; break; + case T_diff_pair_uncoupled: constraint.m_Type = DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT; break; default: // fixme: message msg.Printf( _( "Unrecognized item '%s'.| Expected %s." ), @@ -294,7 +294,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule ) reportError( msg ); } - if( constraint.m_Type == DRC_CONSTRAINT_TYPE_DISALLOW ) + if( constraint.m_Type == DISALLOW_CONSTRAINT ) { for( token = NextTok(); token != T_RIGHT; token = NextTok() ) { diff --git a/pcbnew/drc/drc_test_provider_annulus.cpp b/pcbnew/drc/drc_test_provider_annulus.cpp index 4f2a5d5238..23da485703 100644 --- a/pcbnew/drc/drc_test_provider_annulus.cpp +++ b/pcbnew/drc/drc_test_provider_annulus.cpp @@ -28,7 +28,8 @@ #include /* - Via/pad annular ring width test. Checks if there's sufficient copper ring around PTH/NPTH holes (vias/pads) + Via/pad annular ring width test. Checks if there's sufficient copper ring around + PTH/NPTH holes (vias/pads) Errors generated: - DRCE_ANNULUS @@ -70,7 +71,7 @@ bool DRC_TEST_PROVIDER_ANNULUS::Run() { const int delta = 250; // This is the number of tests between 2 calls to the progress bar - if( !m_drcEngine->HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH ) ) + if( !m_drcEngine->HasRulesForConstraintType( ANNULAR_WIDTH_CONSTRAINT ) ) { reportAux( "No annulus constraints found. Skipping check." ); return false; @@ -93,8 +94,7 @@ bool DRC_TEST_PROVIDER_ANNULUS::Run() if( !via ) return true; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, - via ); + auto constraint = m_drcEngine->EvalRulesForItems( ANNULAR_WIDTH_CONSTRAINT, via ); int annulus = ( via->GetWidth() - via->GetDrillValue() ) / 2; bool fail_min = false; bool fail_max = false; @@ -118,18 +118,18 @@ bool DRC_TEST_PROVIDER_ANNULUS::Run() std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_ANNULAR_WIDTH ); if( fail_min ) - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s min annular width %s; actual %s)" ), + m_msg.Printf( _( "(%s min annular width %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), v_min ), MessageTextFromValue( userUnits(), annulus ) ); if( fail_max ) - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s max annular width %s; actual %s)" ), + m_msg.Printf( _( "(%s max annular width %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), v_max ), MessageTextFromValue( userUnits(), annulus ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); @@ -165,7 +165,7 @@ int DRC_TEST_PROVIDER_ANNULUS::GetNumPhases() const std::set DRC_TEST_PROVIDER_ANNULUS::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH }; + return { ANNULAR_WIDTH_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_copper_clearance.cpp b/pcbnew/drc/drc_test_provider_copper_clearance.cpp index a7f7710613..9ac9589611 100644 --- a/pcbnew/drc/drc_test_provider_copper_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_copper_clearance.cpp @@ -107,8 +107,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run() m_board = m_drcEngine->GetBoard(); DRC_CONSTRAINT worstClearanceConstraint; - if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_CLEARANCE, - worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) ) + if( m_drcEngine->QueryWorstConstraint( CLEARANCE_CONSTRAINT, worstClearanceConstraint ) ) { m_largestClearance = worstClearanceConstraint.GetValue().Min(); } @@ -256,8 +255,8 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( TRACK* track, SHA if( m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ) ) return false; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, - track, other, layer ); + auto constraint = m_drcEngine->EvalRulesForItems( CLEARANCE_CONSTRAINT, track, other, + layer ); int minClearance = constraint.GetValue().Min(); int actual; VECTOR2I pos; @@ -325,8 +324,8 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZones( BOARD_ITEM* aItem if( aItem->GetBoundingBox().Intersects( zone->GetCachedBoundingBox() ) ) { - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, - aItem, zone, aLayer ); + auto constraint = m_drcEngine->EvalRulesForItems( CLEARANCE_CONSTRAINT, aItem, zone, + aLayer ); int clearance = constraint.GetValue().Min(); int actual; VECTOR2I pos; @@ -370,6 +369,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() std::shared_ptr trackShape = track->GetEffectiveShape( layer ); m_copperTree.QueryColliding( track, layer, layer, + // Filter: [&]( BOARD_ITEM* other ) -> bool { if( other->HasFlag( SKIP_STRUCT ) ) @@ -382,6 +382,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() return true; }, + // Visitor: [&]( BOARD_ITEM* other ) -> bool { return testTrackAgainstItem( track, trackShape.get(), layer, other ); @@ -449,8 +450,8 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( D_PAD* pad, SHAPE* if( ( pad->FlashLayer( layer ) && otherPad->GetDrillSize().x ) || ( pad->GetDrillSize().x && otherPad->FlashLayer( layer ) ) ) { - constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE, - pad, otherPad ); + constraint = m_drcEngine->EvalRulesForItems( HOLE_CLEARANCE_CONSTRAINT, pad, + otherPad ); clearance = constraint.GetValue().Min(); accountCheck( constraint.GetParentRule() ); @@ -480,8 +481,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( D_PAD* pad, SHAPE* if( testClearance ) { - constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, - pad, other, layer ); + constraint = m_drcEngine->EvalRulesForItems( CLEARANCE_CONSTRAINT, pad, other, layer ); clearance = constraint.GetValue().Min(); accountCheck( constraint ); @@ -532,6 +532,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( ) std::shared_ptr padShape = getShape( pad, layer ); m_copperTree.QueryColliding( pad, layer, layer, + // Filter: [&]( BOARD_ITEM* other ) -> bool { if( other->HasFlag( SKIP_STRUCT ) ) @@ -539,6 +540,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( ) return true; }, + // Visitor [&]( BOARD_ITEM* other ) -> bool { return testPadAgainstItem( pad, padShape.get(), layer, other ); @@ -619,8 +621,8 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZones() // Examine a candidate zone: compare zoneToTest to zoneRef // Get clearance used in zone to zone test. - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, - zoneRef, zoneToTest ); + auto constraint = m_drcEngine->EvalRulesForItems( CLEARANCE_CONSTRAINT, zoneRef, + zoneToTest ); int zone2zoneClearance = constraint.GetValue().Min(); accountCheck( constraint ); @@ -746,7 +748,7 @@ int DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetNumPhases() const std::set DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_CLEARANCE }; + return { CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp index 5ce89290d8..88852ff9bb 100644 --- a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp @@ -219,7 +219,7 @@ int DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::GetNumPhases() const std::set DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE }; + return { COURTYARD_CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp index 5256e1a9ff..d7db7707f2 100644 --- a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp +++ b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp @@ -277,8 +277,8 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run() drc_dbg( 10, "eval dp %p\n", item ); const DRC_CONSTRAINT_TYPE_T constraintsToCheck[] = { - DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP, - DRC_CONSTRAINT_TYPE_DIFF_PAIR_MAX_UNCOUPLED + DIFF_PAIR_GAP_CONSTRAINT, + DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT }; for( int i = 0; i < 2; i++ ) @@ -348,8 +348,8 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run() drc_dbg(10, " coupled prims : %d\n", (int) it.second.coupled.size() ); - OPT gapConstraint = it.first.parentRule->FindConstraint( DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP ); - OPT maxUncoupledConstraint = it.first.parentRule->FindConstraint( DRC_CONSTRAINT_TYPE_DIFF_PAIR_MAX_UNCOUPLED ); + OPT gapConstraint = it.first.parentRule->FindConstraint( DIFF_PAIR_GAP_CONSTRAINT ); + OPT maxUncoupledConstraint = it.first.parentRule->FindConstraint( DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT ); for( auto& item : it.second.itemsN ) { @@ -495,7 +495,7 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run() std::set test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP, DRC_CONSTRAINT_TYPE_DIFF_PAIR_MAX_UNCOUPLED }; + return { DIFF_PAIR_GAP_CONSTRAINT, DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_disallow.cpp b/pcbnew/drc/drc_test_provider_disallow.cpp index 31b8a44cc2..090bf6789e 100644 --- a/pcbnew/drc/drc_test_provider_disallow.cpp +++ b/pcbnew/drc/drc_test_provider_disallow.cpp @@ -64,7 +64,7 @@ public: bool DRC_TEST_PROVIDER_DISALLOW::Run() { - if( !m_drcEngine->HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_DISALLOW ) ) + if( !m_drcEngine->HasRulesForConstraintType( DISALLOW_CONSTRAINT ) ) { reportAux( "No disallow constraints found. Skipping check." ); return false; @@ -76,8 +76,7 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() auto doCheckItem = [&]( BOARD_ITEM* item ) { - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_DISALLOW, - item ); + auto constraint = m_drcEngine->EvalRulesForItems( DISALLOW_CONSTRAINT, item ); if( constraint.m_DisallowFlags ) { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_ALLOWED_ITEMS ); @@ -127,7 +126,7 @@ int DRC_TEST_PROVIDER_DISALLOW::GetNumPhases() const std::set DRC_TEST_PROVIDER_DISALLOW::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_DISALLOW }; + return { DISALLOW_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_edge_clearance.cpp b/pcbnew/drc/drc_test_provider_edge_clearance.cpp index 6c189a4a8e..7b17da1908 100644 --- a/pcbnew/drc/drc_test_provider_edge_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_edge_clearance.cpp @@ -124,11 +124,8 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run() DRC_CONSTRAINT worstClearanceConstraint; - if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, - worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) ) - { + if( m_drcEngine->QueryWorstConstraint( EDGE_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) ) m_largestClearance = worstClearanceConstraint.GetValue().Min(); - } reportAux( "Worst clearance : %d nm", m_largestClearance ); @@ -226,7 +223,7 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run() [&]( BOARD_ITEM* edge ) -> bool { return testAgainstEdge( item, itemShape.get(), edge, - DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, + EDGE_CLEARANCE_CONSTRAINT, DRCE_COPPER_EDGE_CLEARANCE ); }, m_largestClearance ); @@ -238,7 +235,7 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run() [&]( BOARD_ITEM* edge ) -> bool { return testAgainstEdge( item, itemShape.get(), edge, - DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, + SILK_CLEARANCE_CONSTRAINT, DRCE_SILK_MASK_CLEARANCE ); }, m_largestClearance ); @@ -259,7 +256,7 @@ int DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetNumPhases() const std::set DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, DRC_CONSTRAINT_TYPE_SILK_CLEARANCE }; + return { EDGE_CLEARANCE_CONSTRAINT, SILK_CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_hole_clearance.cpp b/pcbnew/drc/drc_test_provider_hole_clearance.cpp index a0d115b337..506cd2006e 100644 --- a/pcbnew/drc/drc_test_provider_hole_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_hole_clearance.cpp @@ -26,7 +26,6 @@ #include #include #include -#include #include #include #include @@ -100,8 +99,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() DRC_CONSTRAINT worstClearanceConstraint; - if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE, - worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) ) + if( m_drcEngine->QueryWorstConstraint( HOLE_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) ) { m_largestClearance = worstClearanceConstraint.GetValue().Min(); reportAux( "Worst hole clearance : %d nm", m_largestClearance ); @@ -180,6 +178,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() std::shared_ptr holeShape = getDrilledHoleShape( via ); m_holeTree.QueryColliding( via, F_Cu, F_Cu, + // Filter: [&]( BOARD_ITEM* other ) -> bool { if( other->HasFlag( SKIP_STRUCT ) ) @@ -187,6 +186,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() return true; }, + // Visitor: [&]( BOARD_ITEM* other ) -> bool { return testHoleAgainstHole( via, holeShape.get(), other ); @@ -206,6 +206,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() std::shared_ptr holeShape = getDrilledHoleShape( pad ); m_holeTree.QueryColliding( pad, F_Cu, F_Cu, + // Filter: [&]( BOARD_ITEM* other ) -> bool { if( other->HasFlag( SKIP_STRUCT ) ) @@ -213,6 +214,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() return true; }, + // Visitor: [&]( BOARD_ITEM* other ) -> bool { return testHoleAgainstHole( pad, holeShape.get(), other ); @@ -244,8 +246,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainstHole( BOARD_ITEM* aItem, S int actual = ( aHole->GetCenter() - otherHole->GetCenter() ).EuclideanNorm(); actual = std::max( 0, actual - aHole->GetRadius() - otherHole->GetRadius() ); - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE, - aItem, aOther ); + auto constraint = m_drcEngine->EvalRulesForItems( HOLE_CLEARANCE_CONSTRAINT, aItem, aOther ); int minClearance = constraint.GetValue().Min(); accountCheck( constraint.GetParentRule() ); @@ -278,7 +279,7 @@ int DRC_TEST_PROVIDER_HOLE_CLEARANCE::GetNumPhases() const std::set DRC_TEST_PROVIDER_HOLE_CLEARANCE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE }; + return { HOLE_CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_hole_size.cpp b/pcbnew/drc/drc_test_provider_hole_size.cpp index dc192c2fa3..5f871da259 100644 --- a/pcbnew/drc/drc_test_provider_hole_size.cpp +++ b/pcbnew/drc/drc_test_provider_hole_size.cpp @@ -131,7 +131,7 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkPad( D_PAD* aPad ) if( holeSize == 0 ) return; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_SIZE, aPad ); + auto constraint = m_drcEngine->EvalRulesForItems( HOLE_SIZE_CONSTRAINT, aPad ); int minHole = constraint.GetValue().Min(); accountCheck( constraint ); @@ -140,12 +140,12 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkPad( D_PAD* aPad ) { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_TOO_SMALL_DRILL ); - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s %s; actual %s)" ), + m_msg.Printf( _( "(%s %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), minHole ), MessageTextFromValue( userUnits(), holeSize ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( aPad ); drcItem->SetViolatingRule( constraint.GetParentRule() ); @@ -173,7 +173,7 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkVia( VIA* via, bool aExceedMicro, bool aE errorCode = DRCE_TOO_SMALL_DRILL; } - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_SIZE, via ); + auto constraint = m_drcEngine->EvalRulesForItems( HOLE_SIZE_CONSTRAINT, via ); int minHole = constraint.GetValue().Min(); accountCheck( constraint ); @@ -182,12 +182,12 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkVia( VIA* via, bool aExceedMicro, bool aE { std::shared_ptr drcItem = DRC_ITEM::Create( errorCode ); - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s %s; actual %s)" ), + m_msg.Printf( _( "(%s %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), minHole ), MessageTextFromValue( userUnits(), via->GetDrillValue() ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( via ); drcItem->SetViolatingRule( constraint.GetParentRule() ); @@ -204,7 +204,7 @@ int DRC_TEST_PROVIDER_HOLE_SIZE::GetNumPhases() const std::set DRC_TEST_PROVIDER_HOLE_SIZE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_HOLE_SIZE }; + return { HOLE_SIZE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_matched_length.cpp b/pcbnew/drc/drc_test_provider_matched_length.cpp index c3dbf87f3b..9958149c7e 100644 --- a/pcbnew/drc/drc_test_provider_matched_length.cpp +++ b/pcbnew/drc/drc_test_provider_matched_length.cpp @@ -22,7 +22,6 @@ #include #include -#include #include #include #include @@ -42,8 +41,6 @@ Todo: arc support */ -namespace test { - class DRC_TEST_PROVIDER_MATCHED_LENGTH : public DRC_TEST_PROVIDER { public: @@ -93,8 +90,6 @@ private: DRC_LENGTH_REPORT m_report; }; -}; - static int computeViaThruLength( VIA *aVia, const std::set &conns ) { @@ -102,10 +97,10 @@ static int computeViaThruLength( VIA *aVia, const std::set drcItem = DRC_ITEM::Create( DRCE_LENGTH_OUT_OF_RANGE ); - wxString msg = - drcItem->GetErrorText() + " (" + aConstraint.GetParentRule()->m_Name + " "; if( minViolation ) { - msg += wxString::Format( _( "minimum length: %s; actual: %s)" ), - MessageTextFromValue( userUnits(), minLen ), - MessageTextFromValue( userUnits(), ent.total ) ); + m_msg.Printf( _( "(%s min length: %s; actual: %s)" ), + aConstraint.GetName(), + MessageTextFromValue( userUnits(), minLen ), + MessageTextFromValue( userUnits(), ent.total ) ); } else if( maxViolation ) { - msg += wxString::Format( _( "maximum length: %s; actual: %s)" ), - MessageTextFromValue( userUnits(), maxLen ), - MessageTextFromValue( userUnits(), ent.total ) ); + m_msg.Printf( _( "(%s max length: %s; actual: %s)" ), + aConstraint.GetName(), + MessageTextFromValue( userUnits(), maxLen ), + MessageTextFromValue( userUnits(), ent.total ) ); } - drcItem->SetErrorMessage( msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); for( auto offendingTrack : ent.items ) drcItem->AddItem( offendingTrack ); @@ -154,15 +149,13 @@ void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengthViolations( } } -void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkewViolations( - DRC_CONSTRAINT& aConstraint, LENGTH_ENTRIES& matchedConnections ) +void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkewViolations( DRC_CONSTRAINT& aConstraint, + LENGTH_ENTRIES& matchedConnections ) { int avgLength = 0; - for( const auto& ent : matchedConnections ) - { + for( const DRC_LENGTH_REPORT::ENTRY& ent : matchedConnections ) avgLength += ent.total; - } avgLength /= matchedConnections.size(); @@ -172,19 +165,17 @@ void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkewViolations( if( aConstraint.GetValue().HasMax() && abs( skew ) > aConstraint.GetValue().Max() ) { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_SKEW_OUT_OF_RANGE ); - wxString msg = - drcItem->GetErrorText() + " (" + aConstraint.GetParentRule()->m_Name + " "; - msg += wxString::Format( _( "maximum skew: %s; actual skew: %s; average net length: %s; actual net length: %s)" ), - MessageTextFromValue( userUnits(), aConstraint.GetValue().Max() ), - MessageTextFromValue( userUnits(), skew ), - MessageTextFromValue( userUnits(), avgLength ), - MessageTextFromValue( userUnits(), ent.total ) - ); + m_msg.Printf( _( "(%s max skew: %s; actual: %s; average net length: %s; actual: %s)" ), + aConstraint.GetName(), + MessageTextFromValue( userUnits(), aConstraint.GetValue().Max() ), + MessageTextFromValue( userUnits(), skew ), + MessageTextFromValue( userUnits(), avgLength ), + MessageTextFromValue( userUnits(), ent.total ) ); - drcItem->SetErrorMessage( msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + " " + m_msg ); - for( auto offendingTrack : ent.items ) + for( BOARD_CONNECTED_ITEM* offendingTrack : ent.items ) drcItem->SetItems( offendingTrack ); drcItem->SetViolatingRule( aConstraint.GetParentRule() ); @@ -195,21 +186,21 @@ void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkewViolations( } -void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCountViolations( - DRC_CONSTRAINT& aConstraint, LENGTH_ENTRIES& matchedConnections ) +void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCountViolations( DRC_CONSTRAINT& aConstraint, + LENGTH_ENTRIES& matchedConnections ) { for( const auto& ent : matchedConnections ) { if( aConstraint.GetValue().HasMax() && ent.viaCount > aConstraint.GetValue().Max() ) { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_TOO_MANY_VIAS ); - wxString msg = - drcItem->GetErrorText() + " (" + aConstraint.GetParentRule()->m_Name + " "; - msg += wxString::Format( _( "max vias: %d; actual: %d" ), - aConstraint.GetValue().Max(), ent.viaCount ); + m_msg.Printf( _( "(%s max count: %d; actual: %d)" ), + aConstraint.GetName(), + aConstraint.GetValue().Max(), + ent.viaCount ); - drcItem->SetErrorMessage( msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); for( auto offendingTrack : ent.items ) drcItem->SetItems( offendingTrack ); @@ -222,13 +213,13 @@ void test::DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCountViolations( } -bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::Run() +bool DRC_TEST_PROVIDER_MATCHED_LENGTH::Run() { return runInternal( false ); } -bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode ) +bool DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode ) { m_board = m_drcEngine->GetBoard(); m_report.Clear(); @@ -245,14 +236,15 @@ bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode [&]( BOARD_ITEM *item ) -> bool { const DRC_CONSTRAINT_TYPE_T constraintsToCheck[] = { - DRC_CONSTRAINT_TYPE_LENGTH, - DRC_CONSTRAINT_TYPE_SKEW, - DRC_CONSTRAINT_TYPE_VIA_COUNT, + LENGTH_CONSTRAINT, + SKEW_CONSTRAINT, + VIA_COUNT_CONSTRAINT, }; for( int i = 0; i < 3; i++ ) { - auto constraint = m_drcEngine->EvalRulesForItems( constraintsToCheck[i], item, nullptr, item->GetLayer() ); + auto constraint = m_drcEngine->EvalRulesForItems( constraintsToCheck[i], item, + nullptr, item->GetLayer() ); if( constraint.IsNull() ) continue; @@ -269,8 +261,8 @@ bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode ftCache->Rebuild( m_board ); - forEachGeometryItem( { PCB_TRACE_T, PCB_VIA_T, PCB_ARC_T }, - LSET::AllCuMask(), evaluateLengthConstraints ); + forEachGeometryItem( { PCB_TRACE_T, PCB_VIA_T, PCB_ARC_T }, LSET::AllCuMask(), + evaluateLengthConstraints ); std::map matches; @@ -342,48 +334,46 @@ bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode auto& matchedConnections = it.second; std::sort( matchedConnections.begin(), matchedConnections.end(), - [] ( const LENGTH_ENTRY&a, const LENGTH_ENTRY&b ) -> int - { - return a.netname < b.netname; - } - ); + [] ( const LENGTH_ENTRY&a, const LENGTH_ENTRY&b ) -> int + { + return a.netname < b.netname; + } ); - reportAux( wxString::Format( _("Length-constrained traces for rule '%s':"), it.first->m_Name ) ); + reportAux( wxString::Format( "Length-constrained traces for rule '%s':", + it.first->m_Name ) ); for( auto& ent : matchedConnections ) { - reportAux(wxString::Format( - " - net: %s, from: %s, to: %s, %d matching items, total: %s (tracks: %s, vias: %s, pad-to-die: %s), vias: %d", - ent.netname, - ent.from, - ent.to, - (int) ent.items.size(), - MessageTextFromValue( userUnits(), ent.total ), - MessageTextFromValue( userUnits(), ent.totalRoute ), - MessageTextFromValue( userUnits(), ent.totalVia ), - MessageTextFromValue( userUnits(), ent.totalPadToDie ), - ent.viaCount - ) ); + reportAux(wxString::Format( " - net: %s, from: %s, to: %s, " + "%d matching items, " + "total: %s (tracks: %s, vias: %s, pad-to-die: %s), " + "vias: %d", + ent.netname, + ent.from, + ent.to, + (int) ent.items.size(), + MessageTextFromValue( userUnits(), ent.total ), + MessageTextFromValue( userUnits(), ent.totalRoute ), + MessageTextFromValue( userUnits(), ent.totalVia ), + MessageTextFromValue( userUnits(), ent.totalPadToDie ), + ent.viaCount ) ); } - OPT lengthConstraint = rule->FindConstraint( DRC_CONSTRAINT_TYPE_LENGTH ); + OPT lengthConstraint = rule->FindConstraint( LENGTH_CONSTRAINT ); + if( lengthConstraint ) - { checkLengthViolations( *lengthConstraint, matchedConnections ); - } - OPT skewConstraint = rule->FindConstraint( DRC_CONSTRAINT_TYPE_SKEW ); + OPT skewConstraint = rule->FindConstraint( SKEW_CONSTRAINT ); + if( skewConstraint ) - { checkSkewViolations( *skewConstraint, matchedConnections ); - } - OPT viaCountConstraint = rule->FindConstraint( DRC_CONSTRAINT_TYPE_VIA_COUNT ); + OPT viaCountConstraint = rule->FindConstraint( VIA_COUNT_CONSTRAINT ); + if( viaCountConstraint ) - { checkViaCountViolations( *viaCountConstraint, matchedConnections ); - } } reportRuleStatistics(); @@ -393,13 +383,13 @@ bool test::DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode } -std::set test::DRC_TEST_PROVIDER_MATCHED_LENGTH::GetConstraintTypes() const +std::set DRC_TEST_PROVIDER_MATCHED_LENGTH::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_LENGTH, DRC_CONSTRAINT_TYPE_SKEW, DRC_CONSTRAINT_TYPE_VIA_COUNT }; + return { LENGTH_CONSTRAINT, SKEW_CONSTRAINT, VIA_COUNT_CONSTRAINT }; } namespace detail { - static DRC_REGISTER_TEST_PROVIDER dummy; + static DRC_REGISTER_TEST_PROVIDER dummy; } diff --git a/pcbnew/drc/drc_test_provider_misc.cpp b/pcbnew/drc/drc_test_provider_misc.cpp index eef30ac04d..2fcc48f0ea 100644 --- a/pcbnew/drc/drc_test_provider_misc.cpp +++ b/pcbnew/drc/drc_test_provider_misc.cpp @@ -95,9 +95,9 @@ void DRC_TEST_PROVIDER_MISC::testOutline() { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE ); - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(not a closed shape)" ) ); + m_msg.Printf( _( "(not a closed shape)" ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( m_board ); reportViolation( drcItem, pt ); @@ -107,9 +107,9 @@ void DRC_TEST_PROVIDER_MISC::testOutline() { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE ); - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(self-intersecting)" ) ); + m_msg.Printf( _( "(self-intersecting)" ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( m_board ); reportViolation( drcItem, pt ); @@ -133,10 +133,10 @@ void DRC_TEST_PROVIDER_MISC::testDisabledLayers() { std::shared_ptrdrcItem = DRC_ITEM::Create( DRCE_DISABLED_LAYER_ITEM ); - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(layer %s)" ), + m_msg.Printf( _( "(layer %s)" ), item->GetLayerName() ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( item ); reportViolation( drcItem, item->GetPosition()); diff --git a/pcbnew/drc/drc_test_provider_silk_clearance.cpp b/pcbnew/drc/drc_test_provider_silk_clearance.cpp index a4b27a8f25..b4760efbf8 100644 --- a/pcbnew/drc/drc_test_provider_silk_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_silk_clearance.cpp @@ -28,7 +28,6 @@ #include #include -#include #include #include #include @@ -97,11 +96,8 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() return true; } - if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, - worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) ) - { + if( m_drcEngine->QueryWorstConstraint( SILK_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) ) m_largestClearance = worstClearanceConstraint.m_Value.Min(); - } reportAux( "Worst clearance : %d nm", m_largestClearance ); @@ -150,7 +146,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() if ( isInvisibleText( aTestItem->parent ) ) return true; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, + auto constraint = m_drcEngine->EvalRulesForItems( SILK_CLEARANCE_CONSTRAINT, aRefItem->parent, aTestItem->parent, aLayers.second ); @@ -185,12 +181,12 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() if( minClearance > 0 ) { - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s clearance %s; actual %s)" ), + m_msg.Printf( _( "(%s clearance %s; actual %s)" ), constraint.GetParentRule()->m_Name, MessageTextFromValue( userUnits(), minClearance ), MessageTextFromValue( userUnits(), actual ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); } drcItem->SetItems( aRefItem->parent, aTestItem->parent ); @@ -247,7 +243,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() std::set DRC_TEST_PROVIDER_SILK_CLEARANCE::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_SILK_CLEARANCE }; + return { SILK_CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_silk_to_mask.cpp b/pcbnew/drc/drc_test_provider_silk_to_mask.cpp index a0fe10e00d..087be042ec 100644 --- a/pcbnew/drc/drc_test_provider_silk_to_mask.cpp +++ b/pcbnew/drc/drc_test_provider_silk_to_mask.cpp @@ -27,7 +27,6 @@ #include #include -#include #include #include #include @@ -92,11 +91,8 @@ bool DRC_TEST_PROVIDER_SILK_TO_MASK::Run() DRC_CONSTRAINT worstClearanceConstraint; m_largestClearance = 0; - if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, - worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) ) - { + if( m_drcEngine->QueryWorstConstraint( SILK_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) ) m_largestClearance = worstClearanceConstraint.m_Value.Min(); - } reportAux( "Worst clearance : %d nm", m_largestClearance ); @@ -126,7 +122,7 @@ bool DRC_TEST_PROVIDER_SILK_TO_MASK::Run() if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) ) return false; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, + auto constraint = m_drcEngine->EvalRulesForItems( SILK_CLEARANCE_CONSTRAINT, aRefItem->parent, aTestItem->parent ); @@ -149,12 +145,12 @@ bool DRC_TEST_PROVIDER_SILK_TO_MASK::Run() if( minClearance > 0 ) { - m_msg.Printf( drcItem->GetErrorText() + wxS( " " ) + _( "(%s clearance %s; actual %s)" ), + m_msg.Printf( _( "(%s clearance %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), minClearance ), MessageTextFromValue( userUnits(), actual ) ); - drcItem->SetErrorMessage( m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); } drcItem->SetItems( aRefItem->parent, aTestItem->parent ); @@ -194,7 +190,7 @@ bool DRC_TEST_PROVIDER_SILK_TO_MASK::Run() std::set DRC_TEST_PROVIDER_SILK_TO_MASK::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_SILK_CLEARANCE }; + return { SILK_CLEARANCE_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_track_width.cpp b/pcbnew/drc/drc_test_provider_track_width.cpp index f62296ef65..e4edeeae8d 100644 --- a/pcbnew/drc/drc_test_provider_track_width.cpp +++ b/pcbnew/drc/drc_test_provider_track_width.cpp @@ -23,7 +23,6 @@ //#include #include -#include #include #include #include @@ -68,7 +67,7 @@ bool DRC_TEST_PROVIDER_TRACK_WIDTH::Run() { const int delta = 100; // This is the number of tests between 2 calls to the progress bar - if( !m_drcEngine->HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_T::DRC_CONSTRAINT_TYPE_TRACK_WIDTH ) ) + if( !m_drcEngine->HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_T::TRACK_WIDTH_CONSTRAINT ) ) { reportAux( "No track width constraints found. Skipping check." ); return false; @@ -101,8 +100,7 @@ bool DRC_TEST_PROVIDER_TRACK_WIDTH::Run() return true; } - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_TRACK_WIDTH, - item ); + auto constraint = m_drcEngine->EvalRulesForItems( TRACK_WIDTH_CONSTRAINT, item ); bool fail_min = false; bool fail_max = false; int constraintWidth; @@ -173,7 +171,7 @@ int DRC_TEST_PROVIDER_TRACK_WIDTH::GetNumPhases() const std::set DRC_TEST_PROVIDER_TRACK_WIDTH::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_TRACK_WIDTH }; + return { TRACK_WIDTH_CONSTRAINT }; } diff --git a/pcbnew/drc/drc_test_provider_via_diameter.cpp b/pcbnew/drc/drc_test_provider_via_diameter.cpp index 4280e2cd5f..c4be95c0f4 100644 --- a/pcbnew/drc/drc_test_provider_via_diameter.cpp +++ b/pcbnew/drc/drc_test_provider_via_diameter.cpp @@ -66,7 +66,7 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() { const int delta = 100; // This is the number of tests between 2 calls to the progress bar - if( !m_drcEngine->HasRulesForConstraintType( DRC_CONSTRAINT_TYPE_VIA_DIAMETER ) ) + if( !m_drcEngine->HasRulesForConstraintType( VIA_DIAMETER_CONSTRAINT ) ) { reportAux( "No diameter constraints found. Skipping check." ); return false; @@ -87,8 +87,7 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() if( !via ) return true; - auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_VIA_DIAMETER, - item ); + auto constraint = m_drcEngine->EvalRulesForItems( VIA_DIAMETER_CONSTRAINT, item ); bool fail_min = false; bool fail_max = false; int constraintDiameter = 0; @@ -108,14 +107,14 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() if( fail_min ) { - m_msg.Printf( wxS( " " ) + _( "(%s min diameter %s; actual %s)" ), + m_msg.Printf( _( "(%s min diameter %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), constraintDiameter ), MessageTextFromValue( userUnits(), actual ) ); } else if( fail_max ) { - m_msg.Printf( wxS( " " ) + _( "(%s max diameter %s; actual %s)" ), + m_msg.Printf( _( "(%s max diameter %s; actual %s)" ), constraint.GetName(), MessageTextFromValue( userUnits(), constraintDiameter ), MessageTextFromValue( userUnits(), actual ) ); @@ -125,7 +124,7 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_VIA_DIAMETER ); - drcItem->SetErrorMessage( drcItem->GetErrorText() + m_msg ); + drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); @@ -160,7 +159,7 @@ int DRC_TEST_PROVIDER_VIA_DIAMETER::GetNumPhases() const std::set DRC_TEST_PROVIDER_VIA_DIAMETER::GetConstraintTypes() const { - return { DRC_CONSTRAINT_TYPE_VIA_DIAMETER }; + return { VIA_DIAMETER_CONSTRAINT }; } diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp index e40517b383..db68e01bd2 100644 --- a/pcbnew/router/pns_kicad_iface.cpp +++ b/pcbnew/router/pns_kicad_iface.cpp @@ -206,30 +206,17 @@ bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint( PNS::CONSTRAINT_TYPE aType, if( !drcEngine ) return false; - DRC_CONSTRAINT_TYPE_T hostRuleType; + DRC_CONSTRAINT_TYPE_T hostType; switch ( aType ) { - case PNS::CONSTRAINT_TYPE::CT_CLEARANCE: - hostRuleType = DRC_CONSTRAINT_TYPE_CLEARANCE; - break; - case PNS::CONSTRAINT_TYPE::CT_WIDTH: - hostRuleType = DRC_CONSTRAINT_TYPE_TRACK_WIDTH; - break; - case PNS::CONSTRAINT_TYPE::CT_DIFF_PAIR_GAP: - hostRuleType = DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP; - break; - case PNS::CONSTRAINT_TYPE::CT_LENGTH: - hostRuleType = DRC_CONSTRAINT_TYPE_LENGTH; - break; - case PNS::CONSTRAINT_TYPE::CT_VIA_DIAMETER: - hostRuleType = DRC_CONSTRAINT_TYPE_VIA_DIAMETER; - break; - case PNS::CONSTRAINT_TYPE::CT_VIA_HOLE: - hostRuleType = DRC_CONSTRAINT_TYPE_HOLE_SIZE; - break; - default: - return false; // should not happen + case PNS::CONSTRAINT_TYPE::CT_CLEARANCE: hostType = CLEARANCE_CONSTRAINT; break; + case PNS::CONSTRAINT_TYPE::CT_WIDTH: hostType = TRACK_WIDTH_CONSTRAINT; break; + case PNS::CONSTRAINT_TYPE::CT_DIFF_PAIR_GAP: hostType = DIFF_PAIR_GAP_CONSTRAINT; break; + case PNS::CONSTRAINT_TYPE::CT_LENGTH: hostType = LENGTH_CONSTRAINT; break; + case PNS::CONSTRAINT_TYPE::CT_VIA_DIAMETER: hostType = VIA_DIAMETER_CONSTRAINT; break; + case PNS::CONSTRAINT_TYPE::CT_VIA_HOLE: hostType = HOLE_SIZE_CONSTRAINT; break; + default: return false; // should not happen } BOARD_ITEM* parentA = aItemA ? aItemA->Parent() : nullptr; @@ -275,7 +262,7 @@ bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint( PNS::CONSTRAINT_TYPE aType, if( parentA ) { - hostConstraint = drcEngine->EvalRulesForItems( hostRuleType, parentA, parentB, + hostConstraint = drcEngine->EvalRulesForItems( hostType, parentA, parentB, (PCB_LAYER_ID) aLayer ); } diff --git a/pcbnew/router/router_tool.cpp b/pcbnew/router/router_tool.cpp index ebeb3cb16a..e572c7ac91 100644 --- a/pcbnew/router/router_tool.cpp +++ b/pcbnew/router/router_tool.cpp @@ -877,12 +877,12 @@ int ROUTER_TOOL::onViaCommand( const TOOL_EVENT& aEvent ) DRC_CONSTRAINT constraint; - constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_VIA_DIAMETER, - &dummyVia, nullptr, currentLayer ); + constraint = bds.m_DRCEngine->EvalRulesForItems( VIA_DIAMETER_CONSTRAINT, &dummyVia, + nullptr, currentLayer ); sizes.SetViaDiameter( constraint.m_Value.OptThenMin() ); - constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_SIZE, - &dummyVia, nullptr, currentLayer ); + constraint = bds.m_DRCEngine->EvalRulesForItems( HOLE_SIZE_CONSTRAINT, &dummyVia, nullptr, + currentLayer ); sizes.SetViaDrill( constraint.m_Value.OptThenMin() ); } else diff --git a/pcbnew/tools/pcb_inspection_tool.cpp b/pcbnew/tools/pcb_inspection_tool.cpp index 74f38f5409..a1879aceaf 100644 --- a/pcbnew/tools/pcb_inspection_tool.cpp +++ b/pcbnew/tools/pcb_inspection_tool.cpp @@ -211,10 +211,10 @@ void PCB_INSPECTION_TOOL::reportClearance( DRC_CONSTRAINT_TYPE_T aClearanceType, int clearance = 0; - if( aClearanceType == DRC_CONSTRAINT_TYPE_CLEARANCE ) + if( aClearanceType == CLEARANCE_CONSTRAINT ) { - auto edgeConstraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, - aA, aB, aLayer, r ); + auto edgeConstraint = drcEngine.EvalRulesForItems( EDGE_CLEARANCE_CONSTRAINT, aA, aB, + aLayer, r ); clearance = edgeConstraint.m_Value.HasMin() ? edgeConstraint.m_Value.Min() : 0; } @@ -309,7 +309,7 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent ) getItemDescription( a ), getItemDescription( b ) ) ); - reportClearance( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, layer, a, b, r ); + reportClearance( SILK_CLEARANCE_CONSTRAINT, layer, a, b, r ); } else if( !( a->GetLayerSet() & LSET( 2, layer, Edge_Cuts ) ).any() ) { @@ -353,7 +353,7 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent ) else { // Different nets (or one or both unconnected).... - reportClearance( DRC_CONSTRAINT_TYPE_CLEARANCE, layer, a, b, r ); + reportClearance( CLEARANCE_CONSTRAINT, layer, a, b, r ); } } @@ -428,8 +428,8 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) } else { - auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_TRACK_WIDTH, item, - nullptr, UNDEFINED_LAYER, r ); + auto constraint = drcEngine.EvalRulesForItems( TRACK_WIDTH_CONSTRAINT, item, nullptr, + UNDEFINED_LAYER, r ); wxString min = _( "undefined" ); wxString max = _( "undefined" ); @@ -465,8 +465,8 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) } else { - auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_VIA_DIAMETER, - item, nullptr, UNDEFINED_LAYER, r ); + auto constraint = drcEngine.EvalRulesForItems( VIA_DIAMETER_CONSTRAINT, item, nullptr, + UNDEFINED_LAYER, r ); wxString min = _( "undefined" ); wxString max = _( "undefined" ); @@ -499,8 +499,8 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) } else { - auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, - item, nullptr, UNDEFINED_LAYER, r ); + auto constraint = drcEngine.EvalRulesForItems( ANNULAR_WIDTH_CONSTRAINT, item, nullptr, + UNDEFINED_LAYER, r ); wxString min = _( "undefined" ); wxString max = _( "undefined" ); @@ -537,8 +537,8 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) } else { - auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_HOLE_SIZE, item, - nullptr, UNDEFINED_LAYER, r ); + auto constraint = drcEngine.EvalRulesForItems( HOLE_SIZE_CONSTRAINT, item, nullptr, + UNDEFINED_LAYER, r ); wxString min = _( "undefined" ); @@ -566,8 +566,8 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) } else { - auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_DISALLOW, item, - nullptr, UNDEFINED_LAYER, r ); + auto constraint = drcEngine.EvalRulesForItems( DISALLOW_CONSTRAINT, item, nullptr, + UNDEFINED_LAYER, r ); r->Report( "" ); diff --git a/pcbnew/tracks_cleaner.cpp b/pcbnew/tracks_cleaner.cpp index 920f975ad0..a47abe9a3d 100644 --- a/pcbnew/tracks_cleaner.cpp +++ b/pcbnew/tracks_cleaner.cpp @@ -280,17 +280,19 @@ void TRACKS_CLEANER::cleanup( bool aDeleteDuplicateVias, bool aDeleteNullSegment if( via->GetStart() != via->GetEnd() ) via->SetEnd( via->GetStart() ); - rtree.QueryColliding( via, via->GetLayer(), via->GetLayer(), nullptr, + rtree.QueryColliding( via, via->GetLayer(), via->GetLayer(), + // Filter: + [&]( BOARD_ITEM* aItem ) -> bool + { + return aItem->Type() == PCB_VIA_T + && !aItem->HasFlag( SKIP_STRUCT ) + && !aItem->HasFlag( IS_DELETED ); + }, + // Visitor: [&]( BOARD_ITEM* aItem ) -> bool { - if( aItem->Type() != PCB_VIA_T ) - return true; - VIA* other = static_cast( aItem ); - if( other->HasFlag( SKIP_STRUCT ) || other->HasFlag( IS_DELETED ) ) - return true; - if( via->GetPosition() == other->GetPosition() && via->GetViaType() == other->GetViaType() && via->GetLayerSet() == other->GetLayerSet() ) @@ -342,17 +344,19 @@ void TRACKS_CLEANER::cleanup( bool aDeleteDuplicateVias, bool aDeleteNullSegment if( aDeleteDuplicateSegments && track->Type() == PCB_TRACE_T ) { - rtree.QueryColliding( track, track->GetLayer(), track->GetLayer(), nullptr, + rtree.QueryColliding( track, track->GetLayer(), track->GetLayer(), + // Filter: + [&]( BOARD_ITEM* aItem ) -> bool + { + return aItem->Type() == PCB_TRACE_T + && !aItem->HasFlag( SKIP_STRUCT ) + && !aItem->HasFlag( IS_DELETED ); + }, + // Visitor: [&]( BOARD_ITEM* aItem ) -> bool { - if( aItem->Type() != PCB_TRACE_T ) - return true; - TRACK* other = static_cast( aItem ); - if( other->HasFlag( SKIP_STRUCT )|| other->HasFlag( IS_DELETED ) ) - return true; - if( track->IsPointOnEnds( other->GetStart() ) && track->IsPointOnEnds( other->GetEnd() ) && track->GetWidth() == other->GetWidth() diff --git a/pcbnew/zone_filler.cpp b/pcbnew/zone_filler.cpp index 4c5df957aa..718f536df3 100644 --- a/pcbnew/zone_filler.cpp +++ b/pcbnew/zone_filler.cpp @@ -749,14 +749,9 @@ void ZONE_FILLER::buildCopperItemClearances( const ZONE_CONTAINER* aZone, PCB_LA // for pads having the same netcode as the zone, the net clearance has no // meaning so use the greater of the zone clearance and the thermal relief if( aPad->GetNetCode() > 0 && aPad->GetNetCode() == aZone->GetNetCode() ) - { gap = std::max( zone_clearance, aZone->GetThermalReliefGap( aPad ) ); - } else - { - gap = evalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aZone, aPad, - aLayer ); - } + gap = evalRulesForItems( CLEARANCE_CONSTRAINT, aZone, aPad, aLayer ); addKnockout( aPad, aLayer, gap, aHoles ); } @@ -793,8 +788,7 @@ void ZONE_FILLER::buildCopperItemClearances( const ZONE_CONTAINER* aZone, PCB_LA { if( aTrack->GetBoundingBox().Intersects( zone_boundingbox ) ) { - int gap = evalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aZone, aTrack, - aLayer ); + int gap = evalRulesForItems( CLEARANCE_CONSTRAINT, aZone, aTrack, aLayer ); gap += extra_margin; @@ -848,13 +842,12 @@ void ZONE_FILLER::buildCopperItemClearances( const ZONE_CONTAINER* aZone, PCB_LA if( aItem->GetBoundingBox().Intersects( zone_boundingbox ) ) { - int gap = evalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aZone, aItem, - aLayer ); + int gap = evalRulesForItems( CLEARANCE_CONSTRAINT, aZone, aItem, aLayer ); if( aItem->IsOnLayer( Edge_Cuts ) ) { - gap = std::max( gap, evalRulesForItems( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, - aZone, aItem, Edge_Cuts ) ); + gap = std::max( gap, evalRulesForItems( EDGE_CLEARANCE_CONSTRAINT, aZone, + aItem, Edge_Cuts ) ); } addKnockout( aItem, aLayer, gap, aItem->IsOnLayer( Edge_Cuts ), aHoles ); @@ -902,16 +895,16 @@ void ZONE_FILLER::buildCopperItemClearances( const ZONE_CONTAINER* aZone, PCB_LA else if( bds.m_ZoneFillVersion == 5 ) { // 5.x used outline with clearance - int gap = evalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aZone, - aKnockout, aLayer ); + int gap = evalRulesForItems( CLEARANCE_CONSTRAINT, aZone, aKnockout, + aLayer ); aKnockout->TransformSmoothedOutlineToPolygon( aHoles, gap, nullptr ); } else { // 6.0 uses filled areas with clearance - int gap = evalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aZone, - aKnockout, aLayer ); + int gap = evalRulesForItems( CLEARANCE_CONSTRAINT, aZone, aKnockout, + aLayer ); SHAPE_POLY_SET poly; aKnockout->TransformShapeWithClearanceToPolygon( poly, aLayer, gap,