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Translated using Weblate (Japanese)

Currently translated at 99.7% (10042 of 10064 strings)

Translation: KiCad EDA/v9
Translate-URL: https://hosted.weblate.org/projects/kicad/v9/ja/
9.0
co8 j 5 months ago
committed by Hosted Weblate
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a6b3cd0bee
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  1. 155
      translation/pofiles/ja.po

155
translation/pofiles/ja.po

@ -16,7 +16,7 @@ msgstr ""
"Project-Id-Version: kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2025-06-20 23:57+0300\n"
"PO-Revision-Date: 2025-06-12 11:01+0000\n"
"PO-Revision-Date: 2025-06-25 17:01+0000\n"
"Last-Translator: co8 j <co8@nifty.com>\n"
"Language-Team: Japanese <https://hosted.weblate.org/projects/kicad/v9/ja/>\n"
"Language: ja\n"
@ -24,7 +24,7 @@ msgstr ""
"Content-Type: text/plain; charset=UTF-8\n"
"Content-Transfer-Encoding: 8bit\n"
"Plural-Forms: nplurals=1; plural=0;\n"
"X-Generator: Weblate 5.12-dev\n"
"X-Generator: Weblate 5.13-dev\n"
"X-Poedit-KeywordsList: _;_HKI\n"
"X-Poedit-Basepath: Source/kicad-master\n"
"X-Poedit-SourceCharset: UTF-8\n"
@ -10971,11 +10971,11 @@ msgid "Unconnected wire to bus entry"
msgstr "バス エントリーまでの未接続の配線"
#: eeschema/connection_graph.cpp:4192
#, fuzzy, c-format
#, c-format
msgid ""
"Hierarchical label \"%s\" in root sheet cannot be connected to non-existent "
"parent sheet"
msgstr "階層ラベル \"%s\" を存在しない親シートに接続できません"
msgstr "ルートシートの階層ラベル \"%s\" を存在しない親シートに接続できません"
#: eeschema/connection_graph.cpp:4257
#, c-format
@ -38404,9 +38404,8 @@ msgid "Update Footprints"
msgstr "フットプリントを更新"
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:41
#, fuzzy
msgid "Replace footprints with those specified by symbols"
msgstr "ネットリスト中の指定でフットプリントを置換"
msgstr "シンボル指定でフットプリントを置換"
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:43
msgid ""
@ -38431,14 +38430,12 @@ msgstr ""
"削除します。"
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:52
#, fuzzy
msgid "Override locks"
msgstr "ロックを無視"
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:64
#, fuzzy
msgid "Update footprint fields from symbols"
msgstr "%s のフットプリントを '%s' から '%s' に更新"
msgstr "シンボルからフットプリントを更新"
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:68
msgid "Remove footprint fields not found in symbols"
@ -39672,7 +39669,6 @@ msgstr ""
"\n"
#: pcbnew/dialogs/panel_setup_rules_help_2constraints.h:2
#, fuzzy
msgid ""
"### Constraints\n"
"\n"
@ -39874,23 +39870,24 @@ msgid ""
"\n"
"\n"
msgstr ""
"### 制約\n"
"### Constraints\n"
"\n"
"| Constraint type | Argument "
"type "
"| "
"Description "
"Description "
"|\n"
"|---------------------------|-----------------------------------------------------------------------------------------------------------------------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|\n"
"|---------------------------|-----------------------------------------------------------------------------------------------------------------------|---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|"
"\n"
"| `annular_width` | min/opt/"
"max "
"| Checks the width of annular rings on vias."
"<br> "
"| Checks the width of annular rings on "
"vias.<br> "
"|\n"
"| `assertion` | \"&lt;"
"expression>\" "
"| Checks the given expression."
"<br> "
"| `assertion` | \"&lt;expression>\""
" "
"| Checks the given "
"expression.<br> "
"|\n"
"| `clearance` | "
"min "
@ -39898,75 +39895,75 @@ msgstr ""
"nets. (See `physical_clearance` if you wish to specify clearance between "
"objects regardless of net.)<br><br>To allow copper objects to overlap "
"(collide), create a `clearance` constraint with the `min` value less than "
"zero (for example, `-1`)."
"<br> "
"zero (for example, `-1`)"
".<br> "
"|\n"
"| `courtyard_clearance` | "
"min "
"| Checks the clearance between footprint courtyards and generates an error "
"if any two courtyards are closer than the `min` distance. If a footprint "
"does not have a courtyard shape, no errors will be generated from this "
"constraint."
"<br> "
"constraint.<br> "
"|\n"
"| `creepage` | "
"min "
"| Specifies the creepage distance between copper objects of different nets."
"<br> "
"| Specifies the creepage distance between copper objects of different "
"nets.<br> "
"|\n"
"| `diff_pair_gap` | min/opt/"
"max "
"| Checks the gap between coupled tracks in a differential pair. Coupled "
"tracks are segments that are parallel to each other. Differential pair gap "
"is not tested on uncoupled portions of a differential pair (for example, the "
"fanout from a component)."
"<br> "
"fanout from a component)"
".<br> "
"|\n"
"| `diff_pair_uncoupled` | "
"max "
"| Checks the distance that a differential pair track is routed uncoupled "
"from the other polarity track in the pair (for example, where the pair fans "
"out from a component, or becomes uncoupled to pass around another object "
"such as a via)."
"<br> "
"such as a via)"
".<br> "
"|\n"
"| `disallow` | "
"`track`<br>`via`<br>`micro_via`<br>`buried_via`<br>`pad`<br>`zone`<br>`text`<br>`graphic`<br>`hole`<br>`footprint`<br> "
"| Specify one or more object types to disallow, separated by spaces. For "
"example, `(constraint disallow track)` or `(constraint disallow track via "
"pad)`. If an object of this type matches the rule condition, a DRC error "
"will be created.<br><br>This constraint is essentially the same as a keepout "
"rule area, but can be used to create more specific keepout restrictions."
"<br> |\n"
"`track`<br>`via`<br>`micro_via`<br>`buried_via`<br>`pad`<br>`zone`<br>`text`<br>`graphic`<br>`hole`<br>`footprint`"
"<br> | Specify one or more object types to disallow, separated by spaces. "
"For example, `(constraint disallow track)` or `(constraint disallow track "
"via pad)`. If an object of this type matches the rule condition, a DRC "
"error will be created.<br><br>This constraint is essentially the same as a "
"keepout rule area, but can be used to create more specific keepout "
"restrictions.<br> "
"|\n"
"| `edge_clearance` | min/opt/"
"max "
"| Checks the clearance between objects and the board edge.<br><br>This can "
"also be thought of as the \"milling tolerance\" as the board edge will "
"include all graphical items on the `Edge.Cuts` layer as well as any *oval* "
"pad holes. (See `physical_hole_clearance` for the drilling "
"tolerance.)<br> "
"pad holes. (See `physical_hole_clearance` for the drilling tolerance.)"
"<br> "
"|\n"
"| `length` | min/"
"max "
"| Checks the total routed length for the nets that match the rule condition "
"and generates an error for each net that is below the `min` value (if "
"specified) or above the `max` value (if specified) of the constraint."
"<br> "
"specified) or above the `max` value (if specified) of the "
"constraint.<br> "
"|\n"
"| `hole` | min/"
"max "
"| Checks the size (diameter) of a drilled hole in a pad or via. For oval "
"holes, the smaller (minor) diameter will be tested against the `min` value "
"(if specified) and the larger (major) diameter will be tested against the "
"`max` value (if specified)."
"<br> "
"holes, the smaller (minor) diameter will be tested against the `min` value ("
"if specified) and the larger (major) diameter will be tested against the "
"`max` value (if specified)"
".<br> "
"|\n"
"| `hole_clearance` | "
"min "
"| Checks the clearance between a drilled hole in a pad or via and copper "
"objects on a different net. The clearance is measured from the diameter of "
"the hole, not its center."
"<br> "
"the hole, not its "
"center.<br> "
"|\n"
"| `hole_to_hole` | "
"min "
@ -39980,8 +39977,8 @@ msgstr ""
"min "
"| Checks the clearance between two objects on a given layer (including non-"
"copper layers).<br><br>While this can perform more general-purpose checks "
"than `clearance`, it is much slower. Use `clearance` where possible."
"<br> "
"than `clearance`, it is much slower. Use `clearance` where "
"possible.<br> "
"|\n"
"| `physical_hole_clearance` | "
"min "
@ -39989,14 +39986,13 @@ msgstr ""
"object, regardless of net. The clearance is measured from the diameter of "
"the hole, not its center.<br><br>This can also be thought of as the "
"\"drilling tolerance\" as it only includes **round** holes (see "
"`edge_clearance` for the milling tolerance)."
"<br> "
"`edge_clearance` for the milling tolerance)"
".<br> "
"|\n"
"| `silk_clearance` | min/opt/"
"max "
"| Checks the clearance between objects on silkscreen layers and other "
"objects."
"<br> "
"objects.<br> "
"|\n"
"| `skew` | "
"max "
@ -40004,53 +40000,72 @@ msgstr ""
"the difference between the length of each net and the average of all the "
"lengths of each net that is matched by the rule. If the absolute value of "
"the difference between that average and the length of any one net is above "
"the constraint `max` value, an error will be generated."
"<br> "
"the constraint `max` value, an error will be "
"generated.<br> "
"|\n"
"| `solder_mask_expansion` | "
"opt "
"| Specifies the solder mask expansion for pads, shapes and "
"tracks. "
"|\n"
"| `solder_paste_abs_margin` | "
"opt "
"| Specifies the absolute solder paste clearance for pads. Usually negative "
"to inset the paste.<br><br>The final solder paste clearace will be the "
"absolute clearance plus the relative "
"clearance. "
"|\n"
"| `solder_paste_rel_margin` | "
"opt "
"| Specifies the relative solder paste clearance for pads. Usually negative "
"to inset the paste.<br><br>The final solder paste clearace will be the "
"absolute clearance plus the relative "
"clearance. "
"|\n"
"| `thermal_relief_gap` | "
"min "
"| Specifies the width of the gap between a pad and a zone with a thermal-"
"relief connection."
"<br> "
"relief "
"connection.<br> "
"|\n"
"| `thermal_spoke_width` | "
"opt "
"| Specifies the width of the spokes connecting a pad to a zone with a "
"thermal-relief connection."
"<br> "
"thermal-relief "
"connection.<br> "
"|\n"
"| `track_width` | min/opt/"
"max "
"| Checks the width of track and arc segments. An error will be generated "
"for each segment that has a width below the `min` value (if specified) or "
"above the `max` value (if specified)."
"<br> "
"above the `max` value (if specified)"
".<br> "
"|\n"
"| `track_angle` | min/opt/"
"max "
"| Checks the angle between two connected track segments. An error will be "
"generated for each connected pair with an angle below the `min` value (if "
"specified) or above the `max` value (if specified)."
"<br> "
"specified) or above the `max` value (if specified)"
".<br> "
"|\n"
"| `track_segment_length` | min/"
"max "
"| Checks the length of track and arc segments. An error will be generated "
"for each segment that has a length below the `min` value (if specified) or "
"above the `max` value (if specified)."
"<br> "
"above the `max` value (if specified)"
".<br> "
"|\n"
"| `via_count` | "
"max "
"| Counts the number of vias on every net matched by the rule condition. If "
"that number exceeds the constraint `max` value on any matched net, an error "
"will be generated for that net."
"<br> "
"will be generated for that "
"net.<br> "
"|\n"
"| `zone_connection` | "
"`solid`<br>`thermal_reliefs`<br>`none` "
"| Specifies the connection to be made between a zone and a pad."
"<br> "
"| `zone_connection` | `solid`<br>`thermal_reliefs`<br>`none`"
" "
"| Specifies the connection to be made between a zone and a "
"pad.<br> "
"|\n"
"\n"
"\n"

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