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@ -277,6 +277,15 @@ bool DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole( BOARD_ITEM* aItem, SHA |
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int epsilon = m_board->GetDesignSettings().GetDRCEpsilon(); |
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SEG::ecoord epsilon_sq = SEG::Square( epsilon ); |
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// Blind-buried or microvias that don't overlap layers aren't an issue.
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if( aItem->Type() == PCB_VIA_T && aOther->Type() == PCB_VIA_T ) |
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{ |
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LSET viaHoleLayers = static_cast<PCB_VIA*>( aItem )->GetLayerSet() & LSET::AllCuMask(); |
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if( ( viaHoleLayers & static_cast<PCB_VIA*>( aOther )->GetLayerSet() ).none() ) |
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return false; |
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} |
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// Holes at same location generate a separate violation
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if( ( aHole->GetCenter() - otherHole->GetCenter() ).SquaredEuclideanNorm() < epsilon_sq ) |
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{ |
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