JamesJCode
9 months ago
24 changed files with 6604 additions and 958 deletions
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2common/CMakeLists.txt
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2common/advanced_config.cpp
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5libs/kimath/include/geometry/shape_line_chain.h
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93pcbnew/board.cpp
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8pcbnew/board.h
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85pcbnew/drc/drc_test_provider_matched_length.cpp
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556pcbnew/length_calculation.cpp
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288pcbnew/length_calculation.h
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53pcbnew/router/pns_kicad_iface.cpp
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2pcbnew/router/pns_kicad_iface.h
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54pcbnew/router/pns_meander_placer_base.cpp
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2pcbnew/router/pns_router.h
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1pcbnew/router/pns_solid.h
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72pcbnew/router/pns_topology.cpp
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871pcbnew/widgets/pcb_net_inspector_panel.cpp
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252pcbnew/widgets/pcb_net_inspector_panel.h
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53pcbnew/widgets/pcb_net_inspector_panel_data_model.h
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31qa/data/pcbnew/length_calculations.kicad_dru
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2971qa/data/pcbnew/length_calculations.kicad_pcb
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658qa/data/pcbnew/length_calculations.kicad_pro
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1340qa/data/pcbnew/length_calculations.kicad_sch
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1qa/tests/pcbnew/CMakeLists.txt
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108qa/tests/pcbnew/drc/test_drc_lengths.cpp
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54qa/tools/pns/pns_log_viewer_frame.h
@ -0,0 +1,556 @@ |
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/*
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* This program source code file is part of KiCad, a free EDA CAD application. |
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* |
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* Copyright The KiCad Developers, see AUTHORS.txt for contributors. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version 2 |
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* of the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, you may find one here: |
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc., |
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA |
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*/ |
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#include <length_calculation.h>
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#include <board.h>
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#include <board_design_settings.h>
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#include <geometry/geometry_utils.h>
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void LENGTH_CALCULATION_ITEM::CalculateViaLayers( const BOARD* aBoard ) |
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{ |
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static std::initializer_list<KICAD_T> traceAndPadTypes = { PCB_TRACE_T, PCB_ARC_T, PCB_PAD_T }; |
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PCB_LAYER_ID top_layer = UNDEFINED_LAYER; |
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PCB_LAYER_ID bottom_layer = UNDEFINED_LAYER; |
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const LSET layers = aBoard->GetDesignSettings().GetEnabledLayers(); |
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for( auto layer_it = layers.copper_layers_begin(); layer_it != layers.copper_layers_end(); ++layer_it ) |
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{ |
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if( aBoard->GetConnectivity()->IsConnectedOnLayer( m_via, *layer_it, traceAndPadTypes ) ) |
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{ |
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if( top_layer == UNDEFINED_LAYER ) |
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top_layer = *layer_it; |
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else |
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bottom_layer = *layer_it; |
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} |
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} |
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if( top_layer == UNDEFINED_LAYER ) |
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top_layer = m_via->TopLayer(); |
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if( bottom_layer == UNDEFINED_LAYER ) |
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bottom_layer = m_via->BottomLayer(); |
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SetLayers( bottom_layer, top_layer ); |
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} |
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void LENGTH_CALCULATION::clipLineToPad( SHAPE_LINE_CHAIN& aLine, const PAD* aPad, PCB_LAYER_ID aLayer, bool aForward ) |
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{ |
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const int start = aForward ? 0 : aLine.PointCount() - 1; |
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const int delta = aForward ? 1 : -1; |
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// Note: we don't apply the clip-to-pad optimization if an arc ends in a pad
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// Room for future improvement.
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if( aLine.IsPtOnArc( start ) ) |
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return; |
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const auto& shape = aPad->GetEffectivePolygon( aLayer, ERROR_INSIDE ); |
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// Skip the "first" (or last) vertex, we already know it's contained in the pad
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int clip = start; |
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for( int vertex = start + delta; aForward ? vertex < aLine.PointCount() : vertex >= 0; vertex += delta ) |
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{ |
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SEG seg( aLine.GetPoint( vertex ), aLine.GetPoint( vertex - delta ) ); |
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bool containsA = shape->Contains( seg.A ); |
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bool containsB = shape->Contains( seg.B ); |
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if( containsA && containsB ) |
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{ |
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// Whole segment is inside: clip out this segment
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clip = vertex; |
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} |
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else if( containsB ) |
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{ |
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// Only one point inside: Find the intersection
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VECTOR2I loc; |
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if( shape->Collide( seg, 0, nullptr, &loc ) ) |
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{ |
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aLine.Replace( vertex - delta, vertex - delta, loc ); |
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} |
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} |
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} |
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if( !aForward && clip < start ) |
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aLine.Remove( clip + 1, start ); |
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else if( clip > start ) |
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aLine.Remove( start, clip - 1 ); |
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// Now connect the dots
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aLine.Insert( aForward ? 0 : aLine.PointCount(), aPad->GetPosition() ); |
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} |
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LENGTH_DETAILS LENGTH_CALCULATION::CalculateLengthDetails( std::vector<LENGTH_CALCULATION_ITEM>& aItems, |
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const PATH_OPTIMISATIONS aOptimisations, |
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const PAD* aStartPad, const PAD* aEndPad, |
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const bool aWithLayerLengths ) const |
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{ |
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// If this set of items has not been optimised, optimise for shortest electrical path
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if( aOptimisations.OptimiseViaLayers || aOptimisations.MergeTracks || aOptimisations.MergeTracks ) |
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{ |
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std::vector<LENGTH_CALCULATION_ITEM*> pads; |
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std::vector<LENGTH_CALCULATION_ITEM*> lines; |
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std::vector<LENGTH_CALCULATION_ITEM*> vias; |
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// Map of line endpoints to line objects
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std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>> linesPositionMap; |
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// Map of pad positions to pad objects
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std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>> padsPositionMap; |
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for( LENGTH_CALCULATION_ITEM& item : aItems ) |
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{ |
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if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::PAD ) |
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{ |
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pads.emplace_back( &item ); |
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padsPositionMap[item.GetPad()->GetPosition()].insert( &item ); |
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} |
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else if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::VIA ) |
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{ |
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vias.emplace_back( &item ); |
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} |
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else if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::LINE ) |
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{ |
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lines.emplace_back( &item ); |
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linesPositionMap[item.GetLine().CPoint( 0 )].insert( &item ); |
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linesPositionMap[item.GetLine().CLastPoint()].insert( &item ); |
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} |
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} |
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if( aOptimisations.OptimiseViaLayers ) |
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optimiseViaLayers( vias, lines, linesPositionMap, padsPositionMap ); |
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if( aOptimisations.MergeTracks ) |
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mergeLines( lines, linesPositionMap ); |
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if( aOptimisations.OptimiseTracesInPads ) |
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optimiseTracesInPads( pads, lines ); |
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} |
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LENGTH_DETAILS details; |
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if( aWithLayerLengths ) |
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details.LayerLengths = std::make_unique<std::map<PCB_LAYER_ID, int64_t>>(); |
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const bool useHeight = m_board->GetDesignSettings().m_UseHeightForLengthCalcs; |
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// If this is a contiguous set of items, check if we have an inferred fanout via at either end. Note that this
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// condition only arises as a result of how PNS assembles tuning paths - for DRC / net inspector calculations these
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// fanout vias will be present in the object set and therefore do not need to be inferred
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if( aOptimisations.InferViaInPad && useHeight ) |
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{ |
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inferViaInPad( aStartPad, aItems.front(), details ); |
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inferViaInPad( aEndPad, aItems.back(), details ); |
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} |
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// Add stats for each item
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for( const LENGTH_CALCULATION_ITEM& item : aItems ) |
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{ |
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// Don't include merged items
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if( item.GetMergeStatus() == LENGTH_CALCULATION_ITEM::MERGE_STATUS::MERGED_RETIRED |
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|| item.Type() == LENGTH_CALCULATION_ITEM::TYPE::UNKNOWN ) |
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{ |
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continue; |
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} |
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if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::LINE ) |
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{ |
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const int64_t length = item.GetLine().Length(); |
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details.TrackLength += length; |
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if( details.LayerLengths ) |
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( *details.LayerLengths )[item.GetStartLayer()] += length; |
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} |
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else if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::VIA && useHeight ) |
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{ |
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const auto [layerStart, layerEnd] = item.GetLayers(); |
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details.ViaLength += stackupHeight( layerStart, layerEnd ); |
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details.NumVias += 1; |
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} |
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else if( item.Type() == LENGTH_CALCULATION_ITEM::TYPE::PAD ) |
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{ |
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details.PadToDieLength += item.GetPad()->GetPadToDieLength(); |
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details.NumPads += 1; |
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} |
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} |
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return details; |
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} |
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void LENGTH_CALCULATION::inferViaInPad( const PAD* aPad, const LENGTH_CALCULATION_ITEM& aItem, |
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LENGTH_DETAILS& aDetails ) const |
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{ |
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if( aPad && aItem.Type() == LENGTH_CALCULATION_ITEM::TYPE::LINE ) |
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{ |
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const PCB_LAYER_ID startBottomLayer = aItem.GetStartLayer(); |
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const LSET padLayers = aPad->Padstack().LayerSet(); |
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if( !padLayers.Contains( startBottomLayer ) ) |
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{ |
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// This must be either F_Cu or B_Cu
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const PCB_LAYER_ID padLayer = padLayers.Contains( F_Cu ) ? F_Cu : B_Cu; |
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aDetails.NumVias += 1; |
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aDetails.ViaLength += stackupHeight( startBottomLayer, padLayer ); |
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} |
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} |
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} |
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int64_t LENGTH_CALCULATION::CalculateLength( std::vector<LENGTH_CALCULATION_ITEM>& aItems, |
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const PATH_OPTIMISATIONS aOptimisations, const PAD* aStartPad, |
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const PAD* aEndPad ) const |
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{ |
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return CalculateLengthDetails( aItems, aOptimisations, aStartPad, aEndPad ).TotalLength(); |
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} |
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int LENGTH_CALCULATION::stackupHeight( const PCB_LAYER_ID aFirstLayer, const PCB_LAYER_ID aSecondLayer ) const |
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{ |
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if( !m_board || !m_board->GetDesignSettings().m_UseHeightForLengthCalcs ) |
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return 0; |
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if( m_board->GetDesignSettings().m_HasStackup ) |
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{ |
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const BOARD_STACKUP& stackup = m_board->GetDesignSettings().GetStackupDescriptor(); |
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return stackup.GetLayerDistance( aFirstLayer, aSecondLayer ); |
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} |
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else |
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{ |
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BOARD_STACKUP stackup; |
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stackup.BuildDefaultStackupList( &m_board->GetDesignSettings(), m_board->GetCopperLayerCount() ); |
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return stackup.GetLayerDistance( aFirstLayer, aSecondLayer ); |
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} |
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} |
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void LENGTH_CALCULATION::mergeLines( |
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std::vector<LENGTH_CALCULATION_ITEM*>& aLines, |
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std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aLinesPositionMap ) |
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{ |
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// Vector of pads, and an associated flag to indicate whether they have been visited by the clustering algorithm
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std::vector<LENGTH_CALCULATION_ITEM*> pads; |
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auto removeFromPositionMap = [&aLinesPositionMap]( LENGTH_CALCULATION_ITEM* line ) |
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{ |
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aLinesPositionMap[line->GetLine().CPoint( 0 )].erase( line ); |
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aLinesPositionMap[line->GetLine().CLastPoint()].erase( line ); |
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}; |
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// Attempts to merge unmerged lines in to aPrimaryLine
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auto tryMerge = [&removeFromPositionMap, &aLinesPositionMap]( const MERGE_POINT aMergePoint, |
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const VECTOR2I& aMergePos, |
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const LENGTH_CALCULATION_ITEM* aPrimaryItem, |
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SHAPE_LINE_CHAIN& aPrimaryLine, bool* aDidMerge ) |
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{ |
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const auto startItr = aLinesPositionMap.find( aMergePos ); |
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if( startItr == aLinesPositionMap.end() ) |
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return; |
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std::unordered_set<LENGTH_CALCULATION_ITEM*>& startItems = startItr->second; |
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if( startItems.size() != 1 ) |
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return; |
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LENGTH_CALCULATION_ITEM* lineToMerge = *startItems.begin(); |
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// Don't merge if line is an arc
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if( !lineToMerge->GetLine().CArcs().empty() ) |
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return; |
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// Don't merge if lines are on different layers
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if( aPrimaryItem->GetStartLayer() != lineToMerge->GetStartLayer() ) |
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return; |
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// Merge the lines
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lineToMerge->SetMergeStatus( LENGTH_CALCULATION_ITEM::MERGE_STATUS::MERGED_RETIRED ); |
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mergeShapeLineChains( aPrimaryLine, lineToMerge->GetLine(), aMergePoint ); |
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removeFromPositionMap( lineToMerge ); |
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*aDidMerge = true; |
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}; |
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// Cluster all lines in to contiguous entities
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for( LENGTH_CALCULATION_ITEM* primaryItem : aLines ) |
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{ |
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// Don't start with an already merged line
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if( primaryItem->GetMergeStatus() != LENGTH_CALCULATION_ITEM::MERGE_STATUS::UNMERGED ) |
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continue; |
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// Remove starting line from the position map
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removeFromPositionMap( primaryItem ); |
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SHAPE_LINE_CHAIN& primaryLine = primaryItem->GetLine(); |
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// Merge all endpoints
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primaryItem->SetMergeStatus( LENGTH_CALCULATION_ITEM::MERGE_STATUS::MERGED_IN_USE ); |
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bool mergeComplete = false; |
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while( !mergeComplete ) |
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{ |
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bool startMerged = false; |
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bool endMerged = false; |
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VECTOR2I startPos = primaryLine.CPoint( 0 ); |
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VECTOR2I endPos = primaryLine.CLastPoint(); |
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tryMerge( MERGE_POINT::START, startPos, primaryItem, primaryLine, &startMerged ); |
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tryMerge( MERGE_POINT::END, endPos, primaryItem, primaryLine, &endMerged ); |
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mergeComplete = !startMerged && !endMerged; |
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} |
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} |
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} |
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void LENGTH_CALCULATION::mergeShapeLineChains( SHAPE_LINE_CHAIN& aPrimary, const SHAPE_LINE_CHAIN& aSecondary, |
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const MERGE_POINT aMergePoint ) |
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{ |
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if( aMergePoint == MERGE_POINT::START ) |
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{ |
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if( aSecondary.GetPoint( 0 ) == aPrimary.GetPoint( 0 ) ) |
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{ |
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for( auto itr = aSecondary.CPoints().begin() + 1; itr != aSecondary.CPoints().end(); ++itr ) |
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aPrimary.Insert( 0, *itr ); |
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} |
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else |
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{ |
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wxASSERT( aSecondary.CLastPoint() == aPrimary.GetPoint( 0 ) ); |
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for( auto itr = aSecondary.CPoints().rbegin() + 1; itr != aSecondary.CPoints().rend(); ++itr ) |
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aPrimary.Insert( 0, *itr ); |
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} |
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} |
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else |
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{ |
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if( aSecondary.GetPoint( 0 ) == aPrimary.CLastPoint() ) |
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{ |
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for( auto itr = aSecondary.CPoints().begin() + 1; itr != aSecondary.CPoints().end(); ++itr ) |
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aPrimary.Append( *itr ); |
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} |
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else |
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{ |
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wxASSERT( aSecondary.CLastPoint() == aPrimary.CLastPoint() ); |
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for( auto itr = aSecondary.CPoints().rbegin() + 1; itr != aSecondary.CPoints().rend(); ++itr ) |
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aPrimary.Append( *itr ); |
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} |
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} |
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} |
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void LENGTH_CALCULATION::optimiseTracesInPads( const std::vector<LENGTH_CALCULATION_ITEM*>& aPads, |
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const std::vector<LENGTH_CALCULATION_ITEM*>& aLines ) |
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{ |
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for( LENGTH_CALCULATION_ITEM* padItem : aPads ) |
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{ |
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PAD* pad = padItem->GetPad(); |
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for( LENGTH_CALCULATION_ITEM* lineItem : aLines ) |
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{ |
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// Ignore merged lines
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if( lineItem->GetMergeStatus() != LENGTH_CALCULATION_ITEM::MERGE_STATUS::MERGED_IN_USE ) |
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continue; |
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const PCB_LAYER_ID pcbLayer = lineItem->GetStartLayer(); |
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SHAPE_LINE_CHAIN& line = lineItem->GetLine(); |
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OptimiseTraceInPad( line, pad, pcbLayer ); |
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} |
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} |
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} |
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void LENGTH_CALCULATION::optimiseViaLayers( |
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const std::vector<LENGTH_CALCULATION_ITEM*>& aVias, std::vector<LENGTH_CALCULATION_ITEM*>& aLines, |
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std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aLinesPositionMap, |
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const std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aPadsPositionMap ) |
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{ |
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for( LENGTH_CALCULATION_ITEM* via : aVias ) |
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{ |
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auto lineItr = aLinesPositionMap.find( via->GetVia()->GetPosition() ); |
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if( lineItr == aLinesPositionMap.end() ) |
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continue; |
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std::unordered_set<LENGTH_CALCULATION_ITEM*>& connectedLines = lineItr->second; |
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if( connectedLines.empty() ) |
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{ |
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// No connected lines - this via is floating. Set both layers to the same
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via->SetLayers( via->GetVia()->GetLayer(), via->GetVia()->GetLayer() ); |
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} |
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else if( connectedLines.size() == 1 ) |
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{ |
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// This is either a via stub, or a via-in-pad
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bool isViaInPad = false; |
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const PCB_LAYER_ID lineLayer = ( *connectedLines.begin() )->GetStartLayer(); |
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auto padItr = aPadsPositionMap.find( via->GetVia()->GetPosition() ); |
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if( padItr != aLinesPositionMap.end() ) |
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{ |
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// This could be a via-in-pad - check for overlapping pads which are not on the line layer
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const std::unordered_set<LENGTH_CALCULATION_ITEM*>& pads = padItr->second; |
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if( pads.size() == 1 ) |
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{ |
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const LENGTH_CALCULATION_ITEM* padItem = *pads.begin(); |
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if( !padItem->GetPad()->Padstack().LayerSet().Contains( lineLayer ) ) |
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{ |
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// This is probably a via-in-pad
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isViaInPad = true; |
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via->SetLayers( lineLayer, padItem->GetStartLayer() ); |
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} |
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} |
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} |
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if( !isViaInPad ) |
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{ |
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// This is a via stub - make its electrical length 0
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via->SetLayers( lineLayer, lineLayer ); |
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} |
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} |
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else |
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{ |
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// This via has more than one track ending at it. Calculate the connected layer span (which may be shorter
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// than the overall via span)
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LSET layers; |
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for( const LENGTH_CALCULATION_ITEM* lineItem : connectedLines ) |
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layers.set( lineItem->GetStartLayer() ); |
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LSEQ cuStack = layers.CuStack(); |
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PCB_LAYER_ID firstLayer = UNDEFINED_LAYER; |
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PCB_LAYER_ID lastLayer = UNDEFINED_LAYER; |
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for( PCB_LAYER_ID layer : cuStack ) |
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{ |
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if( firstLayer == UNDEFINED_LAYER ) |
|||
firstLayer = layer; |
|||
else |
|||
lastLayer = layer; |
|||
} |
|||
|
|||
if( lastLayer == UNDEFINED_LAYER ) |
|||
via->SetLayers( firstLayer, firstLayer ); |
|||
else |
|||
via->SetLayers( firstLayer, lastLayer ); |
|||
} |
|||
} |
|||
} |
|||
|
|||
|
|||
void LENGTH_CALCULATION::OptimiseTraceInPad( SHAPE_LINE_CHAIN& aLine, const PAD* aPad, const PCB_LAYER_ID aPcbLayer ) |
|||
{ |
|||
// Only consider lines which terminate in the pad
|
|||
if( aLine.CPoint( 0 ) != aPad->GetPosition() && aLine.CLastPoint() != aPad->GetPosition() ) |
|||
return; |
|||
|
|||
if( !aPad->FlashLayer( aPcbLayer ) ) |
|||
return; |
|||
|
|||
const auto& shape = aPad->GetEffectivePolygon( aPcbLayer, ERROR_INSIDE ); |
|||
|
|||
if( shape->Contains( aLine.CPoint( 0 ) ) ) |
|||
clipLineToPad( aLine, aPad, aPcbLayer, true ); |
|||
else if( shape->Contains( aLine.CPoint( -1 ) ) ) |
|||
clipLineToPad( aLine, aPad, aPcbLayer, false ); |
|||
} |
|||
|
|||
|
|||
LENGTH_CALCULATION_ITEM LENGTH_CALCULATION::GetLengthCalculationItem( BOARD_CONNECTED_ITEM* aBoardItem ) const |
|||
{ |
|||
if( PCB_TRACK* track = dynamic_cast<PCB_TRACK*>( aBoardItem ) ) |
|||
{ |
|||
if( track->Type() == PCB_VIA_T ) |
|||
{ |
|||
PCB_VIA* via = static_cast<PCB_VIA*>( track ); |
|||
|
|||
LENGTH_CALCULATION_ITEM item; |
|||
item.SetVia( via ); |
|||
item.CalculateViaLayers( m_board ); |
|||
|
|||
return item; |
|||
} |
|||
|
|||
if( track->Type() == PCB_ARC_T ) |
|||
{ |
|||
PCB_ARC* arcParent = static_cast<PCB_ARC*>( track ); |
|||
SHAPE_ARC shapeArc( arcParent->GetStart(), arcParent->GetMid(), arcParent->GetEnd(), |
|||
arcParent->GetWidth() ); |
|||
SHAPE_LINE_CHAIN chainArc( shapeArc ); |
|||
|
|||
LENGTH_CALCULATION_ITEM item; |
|||
item.SetLine( chainArc ); |
|||
item.SetLayers( track->GetLayer() ); |
|||
|
|||
return item; |
|||
} |
|||
|
|||
if( track->Type() == PCB_TRACE_T ) |
|||
{ |
|||
std::vector<VECTOR2I> points{ track->GetStart(), track->GetEnd() }; |
|||
SHAPE_LINE_CHAIN shape( points ); |
|||
|
|||
LENGTH_CALCULATION_ITEM item; |
|||
item.SetLine( shape ); |
|||
item.SetLayers( track->GetLayer() ); |
|||
|
|||
return item; |
|||
} |
|||
} |
|||
else if( PAD* pad = dynamic_cast<PAD*>( aBoardItem ) ) |
|||
{ |
|||
LENGTH_CALCULATION_ITEM item; |
|||
item.SetPad( pad ); |
|||
|
|||
LSET& layers = pad->Padstack().LayerSet(); |
|||
PCB_LAYER_ID firstLayer = UNDEFINED_LAYER; |
|||
PCB_LAYER_ID secondLayer = UNDEFINED_LAYER; |
|||
|
|||
for( auto itr = layers.copper_layers_begin(); itr != layers.copper_layers_end(); ++itr ) |
|||
{ |
|||
if( firstLayer == UNDEFINED_LAYER ) |
|||
firstLayer = *itr; |
|||
else |
|||
secondLayer = *itr; |
|||
} |
|||
|
|||
item.SetLayers( firstLayer, secondLayer ); |
|||
|
|||
return item; |
|||
} |
|||
|
|||
return {}; |
|||
} |
|||
@ -0,0 +1,288 @@ |
|||
/* |
|||
* This program source code file is part of KiCad, a free EDA CAD application. |
|||
* |
|||
* Copyright The KiCad Developers, see AUTHORS.txt for contributors. |
|||
* |
|||
* This program is free software; you can redistribute it and/or |
|||
* modify it under the terms of the GNU General Public License |
|||
* as published by the Free Software Foundation; either version 2 |
|||
* of the License, or (at your option) any later version. |
|||
* |
|||
* This program is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU General Public License |
|||
* along with this program; if not, you may find one here: |
|||
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
|||
* or you may search the http://www.gnu.org website for the version 2 license, |
|||
* or you may write to the Free Software Foundation, Inc., |
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA |
|||
*/ |
|||
|
|||
#ifndef PCBNEW_LENGTH_CALCULATION_H |
|||
#define PCBNEW_LENGTH_CALCULATION_H |
|||
|
|||
#include <board_design_settings.h> |
|||
#include <geometry/shape_line_chain.h> |
|||
#include <pad.h> |
|||
#include <pcb_track.h> |
|||
#include <layer_ids.h> |
|||
#include <unordered_set> |
|||
#include <connectivity/connectivity_data.h> |
|||
|
|||
class BOARD; |
|||
|
|||
/** |
|||
* Lightweight class which holds a pad, via, or a routed trace outline. Proxied objects passed by pointer are not |
|||
* owned by this container. |
|||
*/ |
|||
class LENGTH_CALCULATION_ITEM |
|||
{ |
|||
public: |
|||
/// The type of routing object this item proxies |
|||
enum class TYPE |
|||
{ |
|||
UNKNOWN, |
|||
PAD, |
|||
LINE, |
|||
VIA |
|||
}; |
|||
|
|||
/// Whether this item is UNMERGED, it has been merged and should be used (MERGED_IN_USE), or it has been merged |
|||
/// and has been retired from use (MERGED_RETIRED). MERGED_RETIRED essentially means the object has been merged |
|||
/// in to a MERGED_IN_USE item. |
|||
enum class MERGE_STATUS |
|||
{ |
|||
UNMERGED, |
|||
MERGED_IN_USE, |
|||
MERGED_RETIRED |
|||
}; |
|||
|
|||
/// Gets the routing item type |
|||
TYPE Type() const { return m_type; }; |
|||
|
|||
/// Sets the parent PAD associated with this item |
|||
void SetPad( PAD* aPad ) |
|||
{ |
|||
m_type = TYPE::PAD; |
|||
m_pad = aPad; |
|||
} |
|||
|
|||
/// Gets the parent PAD associated with this item |
|||
PAD* GetPad() const { return m_pad; } |
|||
|
|||
/// Sets the source SHAPE_LINE_CHAIN of this item |
|||
void SetLine( const SHAPE_LINE_CHAIN& aLine ) |
|||
{ |
|||
m_type = TYPE::LINE; |
|||
m_line = aLine; |
|||
} |
|||
|
|||
/// Gets the SHAPE_LINE_CHAIN associated with this item |
|||
SHAPE_LINE_CHAIN& GetLine() const { return m_line; } |
|||
|
|||
/// Sets the VIA associated with this item |
|||
void SetVia( PCB_VIA* aVia ) |
|||
{ |
|||
m_type = TYPE::VIA; |
|||
m_via = aVia; |
|||
} |
|||
|
|||
/// Gets the VIA associated with this item |
|||
PCB_VIA* GetVia() const { return m_via; } |
|||
|
|||
/// Sets the first and last layers associated with this item |
|||
void SetLayers( const PCB_LAYER_ID aStart, const PCB_LAYER_ID aEnd = PCB_LAYER_ID::UNDEFINED_LAYER ) |
|||
{ |
|||
m_layerStart = aStart; |
|||
m_layerEnd = aEnd; |
|||
} |
|||
|
|||
/// Sets the MERGE_STATUS of this item. MERGED_RETIRED essentially means the object has been merged |
|||
/// in to a MERGED_IN_USE item. |
|||
void SetMergeStatus( const MERGE_STATUS aStatus ) { m_mergeStatus = aStatus; } |
|||
|
|||
/// Gets the MERGE_STATUS of this item |
|||
MERGE_STATUS GetMergeStatus() const { return m_mergeStatus; } |
|||
|
|||
/// Gets the upper and lower layers for the proxied item |
|||
std::tuple<PCB_LAYER_ID, PCB_LAYER_ID> GetLayers() const { return { m_layerStart, m_layerEnd }; } |
|||
|
|||
/// Gets the start board layer for the proxied item |
|||
PCB_LAYER_ID GetStartLayer() const { return m_layerStart; } |
|||
|
|||
/// Gets the end board layer for the proxied item. |
|||
PCB_LAYER_ID GetEndLayer() const { return m_layerEnd; } |
|||
|
|||
/// Calculates active via payers for a proxied VIA object |
|||
void CalculateViaLayers( const BOARD* aBoard ); |
|||
|
|||
protected: |
|||
/// A proxied PAD object. Set to nullptr if not proxying a PAD. |
|||
PAD* m_pad{ nullptr }; |
|||
|
|||
/// A proxied SHAPE_LINE_CHAIN object. Line is empty if not proxying a SHAPE_LINE_CHAIN. |
|||
mutable SHAPE_LINE_CHAIN m_line; |
|||
|
|||
/// A proxied PVIAAD object. Set to nullptr if not proxying a VIA. |
|||
PCB_VIA* m_via{ nullptr }; |
|||
|
|||
/// The start board layer for the proxied object |
|||
PCB_LAYER_ID m_layerStart{ PCB_LAYER_ID::UNDEFINED_LAYER }; |
|||
|
|||
/// The end board layer for the proxied object |
|||
PCB_LAYER_ID m_layerEnd{ PCB_LAYER_ID::UNDEFINED_LAYER }; |
|||
|
|||
/// Flags whether this item has already been merged with another |
|||
MERGE_STATUS m_mergeStatus{ MERGE_STATUS::UNMERGED }; |
|||
|
|||
/// The routing object type of the proxied parent |
|||
TYPE m_type{ TYPE::UNKNOWN }; |
|||
}; |
|||
|
|||
|
|||
/** |
|||
* Holds length measurement result details and statistics |
|||
*/ |
|||
struct LENGTH_DETAILS |
|||
{ |
|||
int NumPads{ 0 }; |
|||
int NumVias{ 0 }; |
|||
int ViaLength{ 0 }; |
|||
int64_t TrackLength{ 0 }; |
|||
int PadToDieLength{ 0 }; |
|||
std::unique_ptr<std::map<PCB_LAYER_ID, int64_t>> LayerLengths; |
|||
|
|||
int64_t TotalLength() const { return ViaLength + TrackLength + PadToDieLength; } |
|||
}; |
|||
|
|||
|
|||
/** |
|||
* Struct to control which optimisations the length calculation code runs on |
|||
* the given path objects. This is required as some call sites (e.g. PNS) run |
|||
* their own path optimisation, whereas others (e.g. Net Inspector) do not. |
|||
*/ |
|||
struct PATH_OPTIMISATIONS |
|||
{ |
|||
/// Optimise via layers for height calculations, ensuring only the distance |
|||
/// between routed segments is considered |
|||
bool OptimiseViaLayers = false; |
|||
|
|||
/// Merges all contiguous (end-to-end, same layer) tracks |
|||
bool MergeTracks = false; |
|||
|
|||
/// Optimises the electrical length of tracks within pads. Note that the track |
|||
/// must terminate at the trace anchor point to be considered for |
|||
/// optimisation. Will require MergeTracks if used with a non-contiguous item |
|||
/// set. |
|||
bool OptimiseTracesInPads = false; |
|||
|
|||
/// Determines if there is a via-in-pad present on the board but not in the |
|||
/// item set. This condition can arise from the PNS meander placer. |
|||
/// TODO (JJ): This can be fixed in the router |
|||
bool InferViaInPad = false; |
|||
}; |
|||
|
|||
|
|||
/** |
|||
* Class which calculates lengths (and associated routing statistics) in a BOARD context |
|||
*/ |
|||
class LENGTH_CALCULATION |
|||
{ |
|||
public: |
|||
/// Construct the calculator in the given BOARD context |
|||
explicit LENGTH_CALCULATION( BOARD* aBoard ) : m_board( aBoard ) {} |
|||
|
|||
/** |
|||
* @brief Calculates the electrical length of the given items |
|||
* @param aItems is the vector of items making up the route |
|||
* @param aPathType indicates whether this is an ordered route, or an unordered collection |
|||
* @param aOptimised indicates whether this has been optimised for electrical length (e.g. clipping within pads) |
|||
* @param aStartPad is the starting pad of the route |
|||
* @param aEndPad is the ending pad of the route |
|||
*/ |
|||
int64_t CalculateLength( std::vector<LENGTH_CALCULATION_ITEM>& aItems, PATH_OPTIMISATIONS aOptimisations, |
|||
const PAD* aStartPad = nullptr, const PAD* aEndPad = nullptr ) const; |
|||
|
|||
/** |
|||
* @brief Calculates the electrical length of the given items |
|||
* @param aItems is the vector of items making up the route |
|||
* @param aPathType indicates whether this is an ordered route, or an unordered collection |
|||
* @param aOptimised indicates whether this has been optimised for electrical length (e.g. clipping within pads) |
|||
* @param aStartPad is the starting pad of the route |
|||
* @param aEndPad is the ending pad of the route |
|||
* @param aWithLayerLengths indicates whether the layer length structure should be populated |
|||
*/ |
|||
LENGTH_DETAILS CalculateLengthDetails( std::vector<LENGTH_CALCULATION_ITEM>& aItems, |
|||
PATH_OPTIMISATIONS aOptimisations, const PAD* aStartPad = nullptr, |
|||
const PAD* aEndPad = nullptr, bool aWithLayerLengths = false ) const; |
|||
|
|||
/// Optimises the given trace / line to minimise the electrical path length within the given pad |
|||
static void OptimiseTraceInPad( SHAPE_LINE_CHAIN& aLine, const PAD* aPad, PCB_LAYER_ID aPcbLayer ); |
|||
|
|||
/// Return a LENGTH_CALCULATION_ITEM constructed from the given BOARD_CONNECTED_ITEM |
|||
LENGTH_CALCULATION_ITEM GetLengthCalculationItem( BOARD_CONNECTED_ITEM* aBoardItem ) const; |
|||
|
|||
protected: |
|||
/// The parent board for all items |
|||
BOARD* m_board; |
|||
|
|||
/// Enum to describe whether track merging is attempted from the start or end of a track segment |
|||
enum class MERGE_POINT |
|||
{ |
|||
START, |
|||
END |
|||
}; |
|||
|
|||
/** |
|||
* Returns the stackup distance between the two given layers. |
|||
* |
|||
* Note: Can return 0 if the board design settings disallow stackup height calculations |
|||
*/ |
|||
int stackupHeight( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer ) const; |
|||
|
|||
/** |
|||
* Optimises the given set of items to minimise the electrical path length. At the moment |
|||
* only optimises lines attached to pads, future work could optimise paths through pads |
|||
* |
|||
* Assumes that any polylines are only connected at either end, and not at midpoints |
|||
*/ |
|||
static void optimiseTracesInPads( const std::vector<LENGTH_CALCULATION_ITEM*>& aPads, |
|||
const std::vector<LENGTH_CALCULATION_ITEM*>& aLines ); |
|||
|
|||
/// Clips the given line to the minimal direct electrical length within the pad |
|||
static void clipLineToPad( SHAPE_LINE_CHAIN& aLine, const PAD* aPad, PCB_LAYER_ID aLayer, bool aForward = true ); |
|||
|
|||
/** |
|||
* Optimises the via layers. Ensures that vias that are routed through only on one layer do not count towards total |
|||
* length calculations. |
|||
*/ |
|||
static void |
|||
optimiseViaLayers( const std::vector<LENGTH_CALCULATION_ITEM*>& aVias, |
|||
std::vector<LENGTH_CALCULATION_ITEM*>& aLines, |
|||
std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aLinesPositionMap, |
|||
const std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aPadsPositionMap ); |
|||
|
|||
/** |
|||
* Merges any lines (traces) that are contiguous, on one layer, and with no junctions |
|||
*/ |
|||
static void mergeLines( std::vector<LENGTH_CALCULATION_ITEM*>& aLines, |
|||
std::map<VECTOR2I, std::unordered_set<LENGTH_CALCULATION_ITEM*>>& aLinesPositionMap ); |
|||
|
|||
/** |
|||
* Merges two SHAPE_LINE_CHAINs where there is a shared endpoing. |
|||
* |
|||
* aSecondary is merged in to aPrimary |
|||
*/ |
|||
static void mergeShapeLineChains( SHAPE_LINE_CHAIN& aPrimary, const SHAPE_LINE_CHAIN& aSecondary, |
|||
MERGE_POINT aMergePoint ); |
|||
|
|||
/** |
|||
* Infers if there is a via in the given pad. Adds via details to the length details data structure if found. |
|||
*/ |
|||
void inferViaInPad( const PAD* aPad, const LENGTH_CALCULATION_ITEM& aItem, LENGTH_DETAILS& aDetails ) const; |
|||
}; |
|||
|
|||
#endif //PCBNEW_LENGTH_CALCULATION_H |
|||
871
pcbnew/widgets/pcb_net_inspector_panel.cpp
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -0,0 +1,31 @@ |
|||
(version 1) |
|||
|
|||
(rule "CASE_1" |
|||
(condition "A.hasNetclass('CASE_1')") |
|||
(constraint length (min 13.3345mm) (max 13.3555mm)) |
|||
) |
|||
|
|||
(rule "CASE_2" |
|||
(condition "A.hasNetclass('CASE_2')") |
|||
(constraint length (min 14.8795mm) (max 14.8805mm)) |
|||
) |
|||
|
|||
(rule "CASE_3" |
|||
(condition "A.hasNetclass('CASE_3')") |
|||
(constraint length (min 14.8795mm) (max 14.8805mm)) |
|||
) |
|||
|
|||
(rule "CASE_4" |
|||
(condition "A.hasNetclass('CASE_4')") |
|||
(constraint length (min 16.4245mm) (max 16.4250mm)) |
|||
) |
|||
|
|||
(rule "CASE_5" |
|||
(condition "A.hasNetclass('CASE_5')") |
|||
(constraint length (min 13.5470mm) (max 13.5480mm)) |
|||
) |
|||
|
|||
(rule "CASE_6" |
|||
(condition "A.hasNetclass('CASE_6')") |
|||
(constraint length (min 13.3345mm) (max 13.3555mm)) |
|||
) |
|||
2971
qa/data/pcbnew/length_calculations.kicad_pcb
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -0,0 +1,658 @@ |
|||
{ |
|||
"board": { |
|||
"3dviewports": [], |
|||
"design_settings": { |
|||
"defaults": { |
|||
"apply_defaults_to_fp_fields": false, |
|||
"apply_defaults_to_fp_shapes": false, |
|||
"apply_defaults_to_fp_text": false, |
|||
"board_outline_line_width": 0.05, |
|||
"copper_line_width": 0.2, |
|||
"copper_text_italic": false, |
|||
"copper_text_size_h": 1.5, |
|||
"copper_text_size_v": 1.5, |
|||
"copper_text_thickness": 0.3, |
|||
"copper_text_upright": false, |
|||
"courtyard_line_width": 0.05, |
|||
"dimension_precision": 4, |
|||
"dimension_units": 3, |
|||
"dimensions": { |
|||
"arrow_length": 1270000, |
|||
"extension_offset": 500000, |
|||
"keep_text_aligned": true, |
|||
"suppress_zeroes": true, |
|||
"text_position": 0, |
|||
"units_format": 0 |
|||
}, |
|||
"fab_line_width": 0.1, |
|||
"fab_text_italic": false, |
|||
"fab_text_size_h": 1.0, |
|||
"fab_text_size_v": 1.0, |
|||
"fab_text_thickness": 0.15, |
|||
"fab_text_upright": false, |
|||
"other_line_width": 0.1, |
|||
"other_text_italic": false, |
|||
"other_text_size_h": 1.0, |
|||
"other_text_size_v": 1.0, |
|||
"other_text_thickness": 0.15, |
|||
"other_text_upright": false, |
|||
"pads": { |
|||
"drill": 0.8, |
|||
"height": 1.27, |
|||
"width": 2.54 |
|||
}, |
|||
"silk_line_width": 0.1, |
|||
"silk_text_italic": false, |
|||
"silk_text_size_h": 1.0, |
|||
"silk_text_size_v": 1.0, |
|||
"silk_text_thickness": 0.1, |
|||
"silk_text_upright": false, |
|||
"zones": { |
|||
"min_clearance": 0.5 |
|||
} |
|||
}, |
|||
"diff_pair_dimensions": [], |
|||
"drc_exclusions": [], |
|||
"meta": { |
|||
"version": 2 |
|||
}, |
|||
"rule_severities": { |
|||
"annular_width": "error", |
|||
"clearance": "error", |
|||
"connection_width": "warning", |
|||
"copper_edge_clearance": "error", |
|||
"copper_sliver": "warning", |
|||
"courtyards_overlap": "error", |
|||
"creepage": "error", |
|||
"diff_pair_gap_out_of_range": "error", |
|||
"diff_pair_uncoupled_length_too_long": "error", |
|||
"drill_out_of_range": "error", |
|||
"duplicate_footprints": "warning", |
|||
"extra_footprint": "warning", |
|||
"footprint": "error", |
|||
"footprint_filters_mismatch": "ignore", |
|||
"footprint_symbol_mismatch": "warning", |
|||
"footprint_type_mismatch": "ignore", |
|||
"hole_clearance": "error", |
|||
"hole_to_hole": "warning", |
|||
"holes_co_located": "warning", |
|||
"invalid_outline": "error", |
|||
"isolated_copper": "warning", |
|||
"item_on_disabled_layer": "error", |
|||
"items_not_allowed": "error", |
|||
"length_out_of_range": "error", |
|||
"lib_footprint_issues": "warning", |
|||
"lib_footprint_mismatch": "warning", |
|||
"malformed_courtyard": "error", |
|||
"microvia_drill_out_of_range": "error", |
|||
"mirrored_text_on_front_layer": "warning", |
|||
"missing_courtyard": "ignore", |
|||
"missing_footprint": "warning", |
|||
"net_conflict": "warning", |
|||
"nonmirrored_text_on_back_layer": "warning", |
|||
"npth_inside_courtyard": "ignore", |
|||
"padstack": "warning", |
|||
"pth_inside_courtyard": "ignore", |
|||
"shorting_items": "error", |
|||
"silk_edge_clearance": "warning", |
|||
"silk_over_copper": "warning", |
|||
"silk_overlap": "warning", |
|||
"skew_out_of_range": "error", |
|||
"solder_mask_bridge": "error", |
|||
"starved_thermal": "error", |
|||
"text_height": "warning", |
|||
"text_on_edge_cuts": "error", |
|||
"text_thickness": "warning", |
|||
"through_hole_pad_without_hole": "error", |
|||
"too_many_vias": "error", |
|||
"track_angle": "error", |
|||
"track_dangling": "warning", |
|||
"track_segment_length": "error", |
|||
"track_width": "error", |
|||
"tracks_crossing": "error", |
|||
"unconnected_items": "error", |
|||
"unresolved_variable": "error", |
|||
"via_dangling": "warning", |
|||
"zones_intersect": "error" |
|||
}, |
|||
"rules": { |
|||
"max_error": 0.005, |
|||
"min_clearance": 0.0, |
|||
"min_connection": 0.0, |
|||
"min_copper_edge_clearance": 0.5, |
|||
"min_groove_width": 0.0, |
|||
"min_hole_clearance": 0.25, |
|||
"min_hole_to_hole": 0.25, |
|||
"min_microvia_diameter": 0.2, |
|||
"min_microvia_drill": 0.1, |
|||
"min_resolved_spokes": 2, |
|||
"min_silk_clearance": 0.0, |
|||
"min_text_height": 0.8, |
|||
"min_text_thickness": 0.08, |
|||
"min_through_hole_diameter": 0.3, |
|||
"min_track_width": 0.0, |
|||
"min_via_annular_width": 0.1, |
|||
"min_via_diameter": 0.5, |
|||
"solder_mask_to_copper_clearance": 0.0, |
|||
"use_height_for_length_calcs": true |
|||
}, |
|||
"teardrop_options": [ |
|||
{ |
|||
"td_onpthpad": true, |
|||
"td_onroundshapesonly": false, |
|||
"td_onsmdpad": true, |
|||
"td_ontrackend": false, |
|||
"td_onvia": true |
|||
} |
|||
], |
|||
"teardrop_parameters": [ |
|||
{ |
|||
"td_allow_use_two_tracks": true, |
|||
"td_curve_segcount": 0, |
|||
"td_height_ratio": 1.0, |
|||
"td_length_ratio": 0.5, |
|||
"td_maxheight": 2.0, |
|||
"td_maxlen": 1.0, |
|||
"td_on_pad_in_zone": false, |
|||
"td_target_name": "td_round_shape", |
|||
"td_width_to_size_filter_ratio": 0.9 |
|||
}, |
|||
{ |
|||
"td_allow_use_two_tracks": true, |
|||
"td_curve_segcount": 0, |
|||
"td_height_ratio": 1.0, |
|||
"td_length_ratio": 0.5, |
|||
"td_maxheight": 2.0, |
|||
"td_maxlen": 1.0, |
|||
"td_on_pad_in_zone": false, |
|||
"td_target_name": "td_rect_shape", |
|||
"td_width_to_size_filter_ratio": 0.9 |
|||
}, |
|||
{ |
|||
"td_allow_use_two_tracks": true, |
|||
"td_curve_segcount": 0, |
|||
"td_height_ratio": 1.0, |
|||
"td_length_ratio": 0.5, |
|||
"td_maxheight": 2.0, |
|||
"td_maxlen": 1.0, |
|||
"td_on_pad_in_zone": false, |
|||
"td_target_name": "td_track_end", |
|||
"td_width_to_size_filter_ratio": 0.9 |
|||
} |
|||
], |
|||
"track_widths": [], |
|||
"tuning_pattern_settings": { |
|||
"diff_pair_defaults": { |
|||
"corner_radius_percentage": 80, |
|||
"corner_style": 1, |
|||
"max_amplitude": 1.0, |
|||
"min_amplitude": 0.2, |
|||
"single_sided": false, |
|||
"spacing": 1.0 |
|||
}, |
|||
"diff_pair_skew_defaults": { |
|||
"corner_radius_percentage": 80, |
|||
"corner_style": 1, |
|||
"max_amplitude": 1.0, |
|||
"min_amplitude": 0.2, |
|||
"single_sided": false, |
|||
"spacing": 0.6 |
|||
}, |
|||
"single_track_defaults": { |
|||
"corner_radius_percentage": 80, |
|||
"corner_style": 1, |
|||
"max_amplitude": 1.0, |
|||
"min_amplitude": 0.2, |
|||
"single_sided": false, |
|||
"spacing": 0.6 |
|||
} |
|||
}, |
|||
"via_dimensions": [], |
|||
"zones_allow_external_fillets": false |
|||
}, |
|||
"ipc2581": { |
|||
"dist": "", |
|||
"distpn": "", |
|||
"internal_id": "", |
|||
"mfg": "", |
|||
"mpn": "" |
|||
}, |
|||
"layer_pairs": [], |
|||
"layer_presets": [], |
|||
"viewports": [] |
|||
}, |
|||
"boards": [], |
|||
"component_class_settings": { |
|||
"assignments": [], |
|||
"meta": { |
|||
"version": 0 |
|||
}, |
|||
"sheet_component_classes": { |
|||
"enabled": false |
|||
} |
|||
}, |
|||
"cvpcb": { |
|||
"equivalence_files": [] |
|||
}, |
|||
"erc": { |
|||
"erc_exclusions": [], |
|||
"meta": { |
|||
"version": 0 |
|||
}, |
|||
"pin_map": [ |
|||
[ |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
2, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
2, |
|||
2, |
|||
2, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
1, |
|||
0, |
|||
1, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
1, |
|||
1, |
|||
2, |
|||
1, |
|||
1, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
1, |
|||
1, |
|||
1, |
|||
1, |
|||
1, |
|||
0, |
|||
1, |
|||
1, |
|||
1, |
|||
1, |
|||
1, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
2, |
|||
1, |
|||
2, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
2, |
|||
2, |
|||
2, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
2, |
|||
0, |
|||
1, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
2, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
0, |
|||
2, |
|||
1, |
|||
1, |
|||
0, |
|||
0, |
|||
1, |
|||
0, |
|||
2, |
|||
0, |
|||
0, |
|||
2 |
|||
], |
|||
[ |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2, |
|||
2 |
|||
] |
|||
], |
|||
"rule_severities": { |
|||
"bus_definition_conflict": "error", |
|||
"bus_entry_needed": "error", |
|||
"bus_to_bus_conflict": "error", |
|||
"bus_to_net_conflict": "error", |
|||
"different_unit_footprint": "error", |
|||
"different_unit_net": "error", |
|||
"duplicate_reference": "error", |
|||
"duplicate_sheet_names": "error", |
|||
"endpoint_off_grid": "warning", |
|||
"extra_units": "error", |
|||
"footprint_filter": "ignore", |
|||
"footprint_link_issues": "warning", |
|||
"four_way_junction": "ignore", |
|||
"global_label_dangling": "warning", |
|||
"hier_label_mismatch": "error", |
|||
"label_dangling": "error", |
|||
"label_multiple_wires": "warning", |
|||
"lib_symbol_issues": "warning", |
|||
"lib_symbol_mismatch": "warning", |
|||
"missing_bidi_pin": "warning", |
|||
"missing_input_pin": "warning", |
|||
"missing_power_pin": "error", |
|||
"missing_unit": "warning", |
|||
"multiple_net_names": "warning", |
|||
"net_not_bus_member": "warning", |
|||
"no_connect_connected": "warning", |
|||
"no_connect_dangling": "warning", |
|||
"pin_not_connected": "error", |
|||
"pin_not_driven": "error", |
|||
"pin_to_pin": "warning", |
|||
"power_pin_not_driven": "error", |
|||
"same_local_global_label": "warning", |
|||
"similar_label_and_power": "warning", |
|||
"similar_labels": "warning", |
|||
"similar_power": "warning", |
|||
"simulation_model_issue": "ignore", |
|||
"single_global_label": "ignore", |
|||
"unannotated": "error", |
|||
"unconnected_wire_endpoint": "warning", |
|||
"unit_value_mismatch": "error", |
|||
"unresolved_variable": "error", |
|||
"wire_dangling": "error" |
|||
} |
|||
}, |
|||
"libraries": { |
|||
"pinned_footprint_libs": [], |
|||
"pinned_symbol_libs": [] |
|||
}, |
|||
"meta": { |
|||
"filename": "length_calculations.kicad_pro", |
|||
"version": 3 |
|||
}, |
|||
"net_settings": { |
|||
"classes": [ |
|||
{ |
|||
"bus_width": 12, |
|||
"clearance": 0.2, |
|||
"diff_pair_gap": 0.25, |
|||
"diff_pair_via_gap": 0.25, |
|||
"diff_pair_width": 0.2, |
|||
"line_style": 0, |
|||
"microvia_diameter": 0.3, |
|||
"microvia_drill": 0.1, |
|||
"name": "Default", |
|||
"pcb_color": "rgba(0, 0, 0, 0.000)", |
|||
"priority": 2147483647, |
|||
"schematic_color": "rgba(0, 0, 0, 0.000)", |
|||
"track_width": 0.2, |
|||
"via_diameter": 0.6, |
|||
"via_drill": 0.3, |
|||
"wire_width": 6 |
|||
} |
|||
], |
|||
"meta": { |
|||
"version": 4 |
|||
}, |
|||
"net_colors": null, |
|||
"netclass_assignments": { |
|||
"Net-(R1-Pad2)": [ |
|||
"CASE_1" |
|||
], |
|||
"Net-(R10-Pad1)": [ |
|||
"CASE_5" |
|||
], |
|||
"Net-(R11-Pad2)": [ |
|||
"CASE_6" |
|||
], |
|||
"Net-(R3-Pad2)": [ |
|||
"CASE_2" |
|||
], |
|||
"Net-(R5-Pad2)": [ |
|||
"CASE_3" |
|||
], |
|||
"Net-(R7-Pad2)": [ |
|||
"CASE_4" |
|||
] |
|||
}, |
|||
"netclass_patterns": [] |
|||
}, |
|||
"pcbnew": { |
|||
"last_paths": { |
|||
"gencad": "", |
|||
"idf": "", |
|||
"netlist": "", |
|||
"plot": "", |
|||
"pos_files": "", |
|||
"specctra_dsn": "", |
|||
"step": "", |
|||
"svg": "", |
|||
"vrml": "" |
|||
}, |
|||
"page_layout_descr_file": "" |
|||
}, |
|||
"schematic": { |
|||
"annotate_start_num": 0, |
|||
"bom_export_filename": "${PROJECTNAME}.csv", |
|||
"bom_fmt_presets": [], |
|||
"bom_fmt_settings": { |
|||
"field_delimiter": ",", |
|||
"keep_line_breaks": false, |
|||
"keep_tabs": false, |
|||
"name": "CSV", |
|||
"ref_delimiter": ",", |
|||
"ref_range_delimiter": "", |
|||
"string_delimiter": "\"" |
|||
}, |
|||
"bom_presets": [], |
|||
"bom_settings": { |
|||
"exclude_dnp": false, |
|||
"fields_ordered": [ |
|||
{ |
|||
"group_by": false, |
|||
"label": "Reference", |
|||
"name": "Reference", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": true, |
|||
"label": "Value", |
|||
"name": "Value", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": true, |
|||
"label": "Footprint", |
|||
"name": "Footprint", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": false, |
|||
"label": "Datasheet", |
|||
"name": "Datasheet", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": false, |
|||
"label": "Description", |
|||
"name": "Description", |
|||
"show": false |
|||
}, |
|||
{ |
|||
"group_by": false, |
|||
"label": "Qty", |
|||
"name": "${QUANTITY}", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": false, |
|||
"label": "#", |
|||
"name": "${ITEM_NUMBER}", |
|||
"show": false |
|||
}, |
|||
{ |
|||
"group_by": true, |
|||
"label": "DNP", |
|||
"name": "${DNP}", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": true, |
|||
"label": "Exclude from BOM", |
|||
"name": "${EXCLUDE_FROM_BOM}", |
|||
"show": true |
|||
}, |
|||
{ |
|||
"group_by": true, |
|||
"label": "Exclude from Board", |
|||
"name": "${EXCLUDE_FROM_BOARD}", |
|||
"show": true |
|||
} |
|||
], |
|||
"filter_string": "", |
|||
"group_symbols": true, |
|||
"include_excluded_from_bom": true, |
|||
"name": "", |
|||
"sort_asc": true, |
|||
"sort_field": "Reference" |
|||
}, |
|||
"connection_grid_size": 50.0, |
|||
"drawing": { |
|||
"dashed_lines_dash_length_ratio": 12.0, |
|||
"dashed_lines_gap_length_ratio": 3.0, |
|||
"default_line_thickness": 6.0, |
|||
"default_text_size": 50.0, |
|||
"field_names": [], |
|||
"intersheets_ref_own_page": false, |
|||
"intersheets_ref_prefix": "", |
|||
"intersheets_ref_short": false, |
|||
"intersheets_ref_show": false, |
|||
"intersheets_ref_suffix": "", |
|||
"junction_size_choice": 3, |
|||
"label_size_ratio": 0.375, |
|||
"operating_point_overlay_i_precision": 3, |
|||
"operating_point_overlay_i_range": "~A", |
|||
"operating_point_overlay_v_precision": 3, |
|||
"operating_point_overlay_v_range": "~V", |
|||
"overbar_offset_ratio": 1.23, |
|||
"pin_symbol_size": 25.0, |
|||
"text_offset_ratio": 0.15 |
|||
}, |
|||
"legacy_lib_dir": "", |
|||
"legacy_lib_list": [], |
|||
"meta": { |
|||
"version": 1 |
|||
}, |
|||
"net_format_name": "", |
|||
"page_layout_descr_file": "", |
|||
"plot_directory": "", |
|||
"space_save_all_events": true, |
|||
"spice_current_sheet_as_root": false, |
|||
"spice_external_command": "spice \"%I\"", |
|||
"spice_model_current_sheet_as_root": true, |
|||
"spice_save_all_currents": false, |
|||
"spice_save_all_dissipations": false, |
|||
"spice_save_all_voltages": false, |
|||
"subpart_first_id": 65, |
|||
"subpart_id_separator": 0 |
|||
}, |
|||
"sheets": [ |
|||
[ |
|||
"a4e4d485-017a-4720-8992-147a6425c6a8", |
|||
"Root" |
|||
] |
|||
], |
|||
"text_variables": {} |
|||
} |
|||
1340
qa/data/pcbnew/length_calculations.kicad_sch
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -0,0 +1,108 @@ |
|||
/*
|
|||
* This program source code file is part of KiCad, a free EDA CAD application. |
|||
* |
|||
* Copyright The KiCad Developers, see AUTHORS.txt for contributors. |
|||
* |
|||
* This program is free software; you can redistribute it and/or |
|||
* modify it under the terms of the GNU General Public License |
|||
* as published by the Free Software Foundation; either version 2 |
|||
* of the License, or (at your option) any later version. |
|||
* |
|||
* This program is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU General Public License |
|||
* along with this program; if not, you may find one here: |
|||
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
|
|||
* or you may search the http://www.gnu.org website for the version 2 license,
|
|||
* or you may write to the Free Software Foundation, Inc., |
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA |
|||
*/ |
|||
|
|||
#include <qa_utils/wx_utils/unit_test_utils.h>
|
|||
#include <pcbnew_utils/board_test_utils.h>
|
|||
#include <board.h>
|
|||
#include <board_design_settings.h>
|
|||
#include <pad.h>
|
|||
#include <pcb_track.h>
|
|||
#include <pcb_marker.h>
|
|||
#include <footprint.h>
|
|||
#include <drc/drc_item.h>
|
|||
#include <settings/settings_manager.h>
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|
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|
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struct DRC_REGRESSION_TEST_FIXTURE |
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{ |
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DRC_REGRESSION_TEST_FIXTURE() : m_settingsManager( true /* headless */ ) {} |
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|
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SETTINGS_MANAGER m_settingsManager; |
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std::unique_ptr<BOARD> m_board; |
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}; |
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|
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|
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BOOST_FIXTURE_TEST_CASE( DRCLengths, DRC_REGRESSION_TEST_FIXTURE ) |
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{ |
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// Check for minimum copper connection errors
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|
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std::vector<std::pair<wxString, int>> tests = { |
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{ "length_calculations", 0 } // Exclude warnings on unconnected pads
|
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}; |
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|
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for( const std::pair<wxString, int>& test : tests ) |
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{ |
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KI_TEST::LoadBoard( m_settingsManager, test.first, m_board ); |
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KI_TEST::FillZones( m_board.get() ); |
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|
|||
std::vector<DRC_ITEM> violations; |
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BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); |
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|
|||
// Disable DRC tests not useful or not handled in this testcase
|
|||
bds.m_DRCSeverities[DRCE_INVALID_OUTLINE] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_UNCONNECTED_ITEMS] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_COPPER_SLIVER] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_STARVED_THERMAL] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_DRILL_OUT_OF_RANGE] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_VIA_DIAMETER] = SEVERITY::RPT_SEVERITY_IGNORE; |
|||
// These DRC tests are not useful and do not work because they need a footprint library
|
|||
// associated to the board
|
|||
bds.m_DRCSeverities[DRCE_LIB_FOOTPRINT_ISSUES] = SEVERITY::RPT_SEVERITY_IGNORE; |
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bds.m_DRCSeverities[DRCE_LIB_FOOTPRINT_MISMATCH] = SEVERITY::RPT_SEVERITY_IGNORE; |
|||
bds.m_DRCSeverities[DRCE_DANGLING_VIA] = SEVERITY::RPT_SEVERITY_IGNORE; |
|||
|
|||
// Ensure that our desired error is fired
|
|||
bds.m_DRCSeverities[DRCE_LENGTH_OUT_OF_RANGE] = SEVERITY::RPT_SEVERITY_ERROR; |
|||
|
|||
bds.m_DRCEngine->SetViolationHandler( |
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[&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer, |
|||
DRC_CUSTOM_MARKER_HANDLER* aCustomHandler ) |
|||
{ |
|||
if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR ) |
|||
violations.push_back( *aItem ); |
|||
} ); |
|||
|
|||
bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false ); |
|||
|
|||
if( violations.size() == test.second ) |
|||
{ |
|||
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
|||
BOOST_TEST_MESSAGE( wxString::Format( "DRC lengths: %s, passed", test.first ) ); |
|||
} |
|||
else |
|||
{ |
|||
UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCH ); |
|||
|
|||
std::map<KIID, EDA_ITEM*> itemMap; |
|||
m_board->FillItemMap( itemMap ); |
|||
|
|||
for( const DRC_ITEM& item : violations ) |
|||
{ |
|||
BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap ) ); |
|||
} |
|||
|
|||
BOOST_ERROR( wxString::Format( "DRC skew: %s, failed (violations found %d expected %d)", test.first, |
|||
(int) violations.size(), test.second ) ); |
|||
} |
|||
} |
|||
} |
|||
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