|
|
|
@ -10,8 +10,8 @@ msgstr "" |
|
|
|
"Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n" |
|
|
|
"Report-Msgid-Bugs-To: \n" |
|
|
|
"POT-Creation-Date: 2021-02-12 10:26-0800\n" |
|
|
|
"PO-Revision-Date: 2021-02-15 15:38+0000\n" |
|
|
|
"Last-Translator: Eric <spice2wolf@gmail.com>\n" |
|
|
|
"PO-Revision-Date: 2021-02-17 22:35+0000\n" |
|
|
|
"Last-Translator: taotieren <admin@taotieren.com>\n" |
|
|
|
"Language-Team: Chinese (Simplified) <https://hosted.weblate.org/projects/" |
|
|
|
"kicad/master-source/zh_Hans/>\n" |
|
|
|
"Language: zh_CN\n" |
|
|
|
@ -19,7 +19,7 @@ msgstr "" |
|
|
|
"Content-Type: text/plain; charset=UTF-8\n" |
|
|
|
"Content-Transfer-Encoding: 8bit\n" |
|
|
|
"Plural-Forms: nplurals=1; plural=0;\n" |
|
|
|
"X-Generator: Weblate 4.5-dev\n" |
|
|
|
"X-Generator: Weblate 4.5\n" |
|
|
|
"X-Poedit-KeywordsList: _HKI;_\n" |
|
|
|
"X-Poedit-Basepath: ../../kicad-source-mirror\n" |
|
|
|
"X-Poedit-SourceCharset: UTF-8\n" |
|
|
|
@ -3285,39 +3285,39 @@ msgstr "过孔焊盘直径" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:476 |
|
|
|
msgid "Via plated hole diameter" |
|
|
|
msgstr "镀过孔(Via plated hole)直径" |
|
|
|
msgstr "通孔镀孔直径" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:477 |
|
|
|
msgid "Microvia pad diameter" |
|
|
|
msgstr "微过孔焊盘直径" |
|
|
|
msgstr "微孔焊盘直径" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:478 |
|
|
|
msgid "Microvia plated hole diameter" |
|
|
|
msgstr "微镀过孔直径" |
|
|
|
msgstr "微孔镀孔直径" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:479 |
|
|
|
msgid "Differential pair track width" |
|
|
|
msgstr "差动线对(Differential pair)导线宽度" |
|
|
|
msgstr "差分对布线宽度" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:480 |
|
|
|
msgid "Differential pair gap" |
|
|
|
msgstr "差动线对间距" |
|
|
|
msgstr "差分对间隙" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:481 |
|
|
|
msgid "Schematic wire thickness" |
|
|
|
msgstr "原理图线厚度" |
|
|
|
msgstr "原理图线宽" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:482 |
|
|
|
msgid "Bus wire thickness" |
|
|
|
msgstr "总线连线厚度" |
|
|
|
msgstr "总线线宽" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:483 |
|
|
|
msgid "Schematic wire color" |
|
|
|
msgstr "原理线颜色" |
|
|
|
msgstr "原理图线色" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:484 |
|
|
|
msgid "Schematic wire line style" |
|
|
|
msgstr "原理线型" |
|
|
|
msgstr "原理图线样式" |
|
|
|
|
|
|
|
#: common/dialogs/panel_setup_netclasses.cpp:535 |
|
|
|
msgid "The default net class is required." |
|
|
|
@ -16985,7 +16985,7 @@ msgid "" |
|
|
|
"does not appear to be a valid KiCad project file." |
|
|
|
msgstr "" |
|
|
|
"文件 '%s'\n" |
|
|
|
"似乎不是有效的 KiCad 项目文件。" |
|
|
|
"似乎不是有效的 KiCad 工程文件。" |
|
|
|
|
|
|
|
#: kicad/kicad_manager_frame.cpp:552 |
|
|
|
msgid "Load File to Edit" |
|
|
|
@ -18906,8 +18906,8 @@ msgid "" |
|
|
|
"No data filename to save modifications.\n" |
|
|
|
"Do you want to exit and abandon your changes?" |
|
|
|
msgstr "" |
|
|
|
"无数据文件名来保存更改。\n" |
|
|
|
"你想退出并放弃您的更改吗?" |
|
|
|
"没有要保存修改的数据文件名。\n" |
|
|
|
"是否要退出并放弃更改?" |
|
|
|
|
|
|
|
#: pcb_calculator/pcb_calculator_frame.cpp:207 |
|
|
|
#, c-format |
|
|
|
@ -18915,8 +18915,8 @@ msgid "" |
|
|
|
"Unable to write file '%s'\n" |
|
|
|
"Do you want to exit and abandon your changes?" |
|
|
|
msgstr "" |
|
|
|
"无法写入文件 '%s'\n" |
|
|
|
"你想退出并放弃你的更改吗?" |
|
|
|
"无法写入文件 \"%s\"\n" |
|
|
|
"是否要退出并放弃修改?" |
|
|
|
|
|
|
|
#: pcb_calculator/regulators_funct.cpp:126 |
|
|
|
#, c-format |
|
|
|
@ -19651,7 +19651,7 @@ msgstr "板边连接器选项。" |
|
|
|
|
|
|
|
#: pcbnew/board_stackup_manager/panel_board_stackup_base.cpp:159 |
|
|
|
msgid "Board thickness from stackup:" |
|
|
|
msgstr "压板的电路板厚度:" |
|
|
|
msgstr "堆叠的电路板厚度:" |
|
|
|
|
|
|
|
#: pcbnew/board_stackup_manager/stackup_predefined_prms.cpp:46 |
|
|
|
msgid "ENIG" |
|
|
|
@ -26779,7 +26779,7 @@ msgstr "检查规则语法" |
|
|
|
msgid "" |
|
|
|
"Text will not be readable with a thickness greater than 1/4 its width or " |
|
|
|
"height." |
|
|
|
msgstr "文本将不可读,因其厚度大于其宽度或高度的 1/4。" |
|
|
|
msgstr "厚度大于其宽度或高度的 1/4 的文本将不可读。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:74 |
|
|
|
msgid "Default properties for new dimension objects:" |
|
|
|
@ -26828,21 +26828,21 @@ msgstr "过孔外径小于最小过孔外径 (%s)。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_tracks_and_vias.cpp:272 |
|
|
|
msgid "No via hole size defined." |
|
|
|
msgstr "未定义过孔尺寸。" |
|
|
|
msgstr "未定义通孔尺寸。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_tracks_and_vias.cpp:279 |
|
|
|
#, c-format |
|
|
|
msgid "Via hole diameter less than minimum through hole diameter (%s)." |
|
|
|
msgstr "过孔直径小于最小通孔直径 (%s)。" |
|
|
|
msgstr "通孔直径小于最小通孔直径 (%s)。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_tracks_and_vias.cpp:288 |
|
|
|
msgid "Via hole diameter larger than via diameter." |
|
|
|
msgstr "过孔直径大于过孔外径。" |
|
|
|
msgstr "通孔直径大于过孔直径。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_tracks_and_vias.cpp:296 |
|
|
|
#, c-format |
|
|
|
msgid "Diameter and hole leave via annulus less than minimum (%s)." |
|
|
|
msgstr "直径和孔使得过孔环小于最小值 (%s)。" |
|
|
|
msgstr "直径和钻头通过的环隙小于最小值 (%s)。" |
|
|
|
|
|
|
|
#: pcbnew/dialogs/panel_setup_tracks_and_vias.cpp:313 |
|
|
|
#, c-format |
|
|
|
@ -27779,12 +27779,12 @@ msgstr "PCB \"%s\" 不存在,你想创建它吗?" |
|
|
|
msgid "" |
|
|
|
"Error occurred when saving footprint '%s' to the project specific footprint " |
|
|
|
"library: %s" |
|
|
|
msgstr "当保存封装 '%s'保存到项目特定的封装库时发生了错误:%s" |
|
|
|
msgstr "将封装 '%s' 保存到工程专用封装库时出错:%s" |
|
|
|
|
|
|
|
#: pcbnew/files.cpp:830 |
|
|
|
#, c-format |
|
|
|
msgid "Error occurred saving the project specific footprint library table: %s" |
|
|
|
msgstr "保存项目特定的封装库时出错,这个库是:%s" |
|
|
|
msgstr "保存到工程专用封装库表时出错:%s" |
|
|
|
|
|
|
|
#: pcbnew/files.cpp:920 pcbnew/files.cpp:1062 |
|
|
|
#, c-format |
|
|
|
@ -28080,7 +28080,7 @@ msgstr "" |
|
|
|
|
|
|
|
#: pcbnew/footprint_libraries_utils.cpp:949 |
|
|
|
msgid "Save Footprint As" |
|
|
|
msgstr "将保存封装为" |
|
|
|
msgstr "将封装另存为" |
|
|
|
|
|
|
|
#: pcbnew/footprint_libraries_utils.cpp:986 |
|
|
|
msgid "No library specified. Footprint could not be saved." |
|
|
|
@ -29237,7 +29237,7 @@ msgstr "" |
|
|
|
|
|
|
|
#: pcbnew/pcbnew_config.cpp:59 |
|
|
|
msgid "Action Plugins" |
|
|
|
msgstr "活动插件" |
|
|
|
msgstr "操作插件" |
|
|
|
|
|
|
|
#: pcbnew/pcbnew_config.cpp:61 |
|
|
|
msgid "Origins & Axes" |
|
|
|
@ -29625,8 +29625,8 @@ msgid "" |
|
|
|
"has been applied instead. When the template is re-filled the thermal reliefs " |
|
|
|
"will be removed." |
|
|
|
msgstr "" |
|
|
|
"该 CADSTAR 模板 '%s' 在原始设计中有散热功能,但 KiCad 中不存在与原始 CADSTAR " |
|
|
|
"设置等同的东西。取而代之的是实心填充。当模板重新填充时,散热将被移除。" |
|
|
|
"CADSTAR 模板 '%s' 在原始设计中具有散热功能,但是没有与原始 CADSTAR 设置等效的 " |
|
|
|
"KiCad。实体填充已被应用。重新填充模板后,散热片将被移除。" |
|
|
|
|
|
|
|
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:1754 |
|
|
|
#, c-format |
|
|
|
@ -29879,7 +29879,7 @@ msgstr "无效的令牌计数。预期为 8,但找到了 %zu" |
|
|
|
#, c-format |
|
|
|
msgid "" |
|
|
|
"Invalid format for record_tag string \"%s\" in Geometric definition row %zu" |
|
|
|
msgstr "record_tag 字符串 \"%s\" 的格式无效位于几何定义行 %zu中" |
|
|
|
msgstr "record_tag 字符串 \"%s\" 的格式无效位于几何定义行 %zu 中" |
|
|
|
|
|
|
|
#: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1207 |
|
|
|
#, c-format |
|
|
|
@ -29890,7 +29890,7 @@ msgstr "未处理的图形项'%s',位于几何定义行 %zu" |
|
|
|
#, c-format |
|
|
|
msgid "" |
|
|
|
"Invalid format for record_tag string \"%s\" in Traces definition row %zu" |
|
|
|
msgstr "record_tag 字符串 \"%s\" 的格式无效位于布线定义行 %zu 中" |
|
|
|
msgstr "record_tag 字符串 \"%s\" 的格式无效位于跟踪定义行 %zu 中" |
|
|
|
|
|
|
|
#: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1391 |
|
|
|
#, c-format |
|
|
|
@ -30740,7 +30740,7 @@ msgstr "发现一个导线_过孔索引指向了丢失的焊盘槽/孔 \"%s\"" |
|
|
|
|
|
|
|
#: pcbnew/swig/pcbnew_action_plugins.cpp:67 |
|
|
|
msgid "Exception on python action plugin code" |
|
|
|
msgstr "Python 活动插件代码异常" |
|
|
|
msgstr "Python 操作插件代码异常" |
|
|
|
|
|
|
|
#: pcbnew/swig/pcbnew_action_plugins.cpp:79 |
|
|
|
#: pcbnew/swig/pcbnew_footprint_wizards.cpp:82 |
|
|
|
@ -31488,11 +31488,11 @@ msgstr "闭合进行中的边界" |
|
|
|
|
|
|
|
#: pcbnew/tools/pcb_actions.cpp:217 |
|
|
|
msgid "Limit Lines to 45 deg" |
|
|
|
msgstr "限制线到 45 度角" |
|
|
|
msgstr "将线限制在 45 度以内" |
|
|
|
|
|
|
|
#: pcbnew/tools/pcb_actions.cpp:217 |
|
|
|
msgid "Limit graphic lines to H, V and 45 degrees" |
|
|
|
msgstr "限制图形线到水平、垂直和 45 度角" |
|
|
|
msgstr "将图形线限制为水平,垂直和 45 度" |
|
|
|
|
|
|
|
#: pcbnew/tools/pcb_actions.cpp:224 |
|
|
|
msgid "Design Rules Checker" |
|
|
|
@ -32558,7 +32558,7 @@ msgstr "差分对交互布线" |
|
|
|
|
|
|
|
#: pcbnew/tools/pcb_actions.cpp:1247 |
|
|
|
msgid "Route differential pairs" |
|
|
|
msgstr "规定差动线对的路线" |
|
|
|
msgstr "布线差分对" |
|
|
|
|
|
|
|
#: pcbnew/tools/pcb_actions.cpp:1253 |
|
|
|
msgid "Interactive Router Settings..." |
|
|
|
|