From 505d764f25cd326e76eeeeca34bb3cff2ac2f727 Mon Sep 17 00:00:00 2001 From: Jeff Young Date: Tue, 13 Oct 2020 23:05:15 +0100 Subject: [PATCH] Set board modify bit only when necessary after Board Setup. Fixes https://gitlab.com/kicad/code/kicad/issues/5685 --- .../panel_board_stackup.cpp | 26 +++++++++-- .../panel_setup_feature_constraints.cpp | 5 ++- pcbnew/dialogs/panel_setup_layers.cpp | 44 +++++++++++++++---- pcbnew/dialogs/panel_setup_mask_and_paste.cpp | 2 + .../dialogs/panel_setup_text_and_graphics.cpp | 4 +- .../dialogs/panel_setup_tracks_and_vias.cpp | 8 ++-- pcbnew/pcb_edit_frame.cpp | 2 - pcbnew/plugins/kicad/kicad_plugin.cpp | 2 +- 8 files changed, 74 insertions(+), 19 deletions(-) diff --git a/pcbnew/board_stackup_manager/panel_board_stackup.cpp b/pcbnew/board_stackup_manager/panel_board_stackup.cpp index 1faa45edae..64bf32b605 100644 --- a/pcbnew/board_stackup_manager/panel_board_stackup.cpp +++ b/pcbnew/board_stackup_manager/panel_board_stackup.cpp @@ -1082,6 +1082,9 @@ bool PANEL_SETUP_BOARD_STACKUP::TransferDataFromWindow() BOARD_STACKUP& brd_stackup = m_brdSettings->GetStackupDescriptor(); + STRING_FORMATTER old_stackup; + brd_stackup.FormatBoardStackup( &old_stackup, m_board, 0 ); + brd_stackup.m_FinishType = m_stackup.m_FinishType; brd_stackup.m_HasDielectricConstrains = m_stackup.m_HasDielectricConstrains; brd_stackup.m_EdgeConnectorConstraints = m_stackup.m_EdgeConnectorConstraints; @@ -1091,14 +1094,31 @@ bool PANEL_SETUP_BOARD_STACKUP::TransferDataFromWindow() // copy enabled items to the new board stackup brd_stackup.RemoveAll(); - for( auto item : m_stackup.GetList() ) + for( BOARD_STACKUP_ITEM* item : m_stackup.GetList() ) { if( item->IsEnabled() ) brd_stackup.Add( new BOARD_STACKUP_ITEM( *item ) ); } - m_brdSettings->SetBoardThickness( GetPcbThickness() ); - m_brdSettings->m_HasStackup = true; + STRING_FORMATTER new_stackup; + brd_stackup.FormatBoardStackup( &new_stackup, m_board, 0 ); + + bool modified = old_stackup.GetString() != new_stackup.GetString(); + + if( m_brdSettings->GetBoardThickness() != GetPcbThickness() ) + { + m_brdSettings->SetBoardThickness( GetPcbThickness() ); + modified = true; + } + + if( !m_brdSettings->m_HasStackup ) + { + m_brdSettings->m_HasStackup = true; + modified = true; + } + + if( modified ) + m_frame->OnModify(); return true; } diff --git a/pcbnew/dialogs/panel_setup_feature_constraints.cpp b/pcbnew/dialogs/panel_setup_feature_constraints.cpp index 54996e3fca..e0d698e299 100644 --- a/pcbnew/dialogs/panel_setup_feature_constraints.cpp +++ b/pcbnew/dialogs/panel_setup_feature_constraints.cpp @@ -110,11 +110,14 @@ bool PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow() if( !m_holeToHoleMin.Validate( 0, 10, EDA_UNITS::INCHES ) ) return false; + // These are all stored in project file, not board, so no need for OnModify() + m_BrdSettings->m_BlindBuriedViaAllowed = m_OptAllowBlindBuriedVias->GetValue(); m_BrdSettings->m_MicroViasAllowed = m_OptAllowMicroVias->GetValue(); m_BrdSettings->m_MaxError = Clamp( IU_PER_MM * MINIMUM_ERROR_SIZE_MM, - m_maxError.GetValue(), IU_PER_MM * MAXIMUM_ERROR_SIZE_MM ); + m_maxError.GetValue(), + IU_PER_MM * MAXIMUM_ERROR_SIZE_MM ); m_BrdSettings->m_ZoneFillVersion = m_rbOutlinePolygonFastest->GetValue() ? 6 : 5; m_BrdSettings->m_ZoneKeepExternalFillets = m_allowExternalFilletsOpt->GetValue(); diff --git a/pcbnew/dialogs/panel_setup_layers.cpp b/pcbnew/dialogs/panel_setup_layers.cpp index 7d6a29d977..3037fd0b9b 100644 --- a/pcbnew/dialogs/panel_setup_layers.cpp +++ b/pcbnew/dialogs/panel_setup_layers.cpp @@ -536,6 +536,7 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() return false; wxString msg; + bool modified = false; // Check for removed layers with items which will get deleted from the board. LSEQ removedLayers = getRemovedLayersWithItems(); @@ -552,14 +553,18 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() "%s\n" "These items will be no longer accessible\n" "Do you wish to continue?" ), msg ) ) ) + { return false; + } } - if( !removedLayers.empty() && - !IsOK( this, _( "Items have been found on removed layers. This operation will delete " - "all items from removed layers and cannot be undone. Do you wish to " - "continue?" ) ) ) + if( !removedLayers.empty() + && !IsOK( this, _( "Items have been found on removed layers. This operation will " + "delete all items from removed layers and cannot be undone.\n" + "Do you wish to continue?" ) ) ) + { return false; + } // Delete all objects on layers that have been removed. Leaving them in copper layers // can (will?) result in DRC errors and it pollutes the board file with cruft. @@ -582,6 +587,7 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() layers.reset( layer_id ); hasRemovedBoardItems = true; + modified = true; if( layers.any() ) { @@ -607,6 +613,8 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() * layers are not visible when exiting this dialog */ m_pcb->SetVisibleLayers( m_enabledLayers ); + + modified = true; } for( LSEQ seq = LSET::AllLayersMask().Seq(); seq; ++seq ) @@ -615,21 +623,38 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() if( m_enabledLayers[layer] ) { - m_pcb->SetLayerName( layer, GetLayerName( layer ) ); + const wxString& newLayerName = GetLayerName( layer ); + + if( m_pcb->GetLayerName( layer ) != newLayerName ) + { + m_pcb->SetLayerName( layer, newLayerName ); + modified = true; + } // Only copper layers have a definable type. if( LSET::AllCuMask().Contains( layer ) ) { LAYER_T t = (LAYER_T) getLayerTypeIndex( layer ); - m_pcb->SetLayerType( layer, t ); + + if( m_pcb->GetLayerType( layer ) != t ) + { + m_pcb->SetLayerType( layer, t ); + modified = true; + } } } } for( LSEQ seq = LSET::UserDefinedLayers().Seq(); seq; ++seq ) { - if( m_enabledLayers[*seq] ) - m_pcb->SetLayerName( *seq, GetLayerName( *seq ) ); + PCB_LAYER_ID layer = *seq; + const wxString& newLayerName = GetLayerName( layer ); + + if( m_enabledLayers[ layer ] && m_pcb->GetLayerName( layer ) != newLayerName ) + { + m_pcb->SetLayerName( layer, newLayerName ); + modified = true; + } } // If some board items are deleted: Rebuild the connectivity, @@ -641,6 +666,9 @@ bool PANEL_SETUP_LAYERS::TransferDataFromWindow() m_frame->Compile_Ratsnest( true ); } + if( modified ) + m_frame->OnModify(); + return true; } diff --git a/pcbnew/dialogs/panel_setup_mask_and_paste.cpp b/pcbnew/dialogs/panel_setup_mask_and_paste.cpp index e8eb5f83dd..8fd5e9abe6 100644 --- a/pcbnew/dialogs/panel_setup_mask_and_paste.cpp +++ b/pcbnew/dialogs/panel_setup_mask_and_paste.cpp @@ -67,6 +67,8 @@ bool PANEL_SETUP_MASK_AND_PASTE::TransferDataToWindow() bool PANEL_SETUP_MASK_AND_PASTE::TransferDataFromWindow() { + // These are all stored in project file, not board, so no need for OnModify() + m_BrdSettings->m_SolderMaskMargin = m_maskMargin.GetValue(); m_BrdSettings->m_SolderMaskMinWidth = m_maskMinWidth.GetValue(); diff --git a/pcbnew/dialogs/panel_setup_text_and_graphics.cpp b/pcbnew/dialogs/panel_setup_text_and_graphics.cpp index 0d83990142..8ff2a92186 100644 --- a/pcbnew/dialogs/panel_setup_text_and_graphics.cpp +++ b/pcbnew/dialogs/panel_setup_text_and_graphics.cpp @@ -207,7 +207,9 @@ bool PANEL_SETUP_TEXT_AND_GRAPHICS::TransferDataFromWindow() wxGridCellBoolEditor::IsTrueValue( m_grid->GetCellValue( i, COL_TEXT_UPRIGHT ) ); } - int mode = m_dimensionUnits->GetSelection(); + // These are all stored in project file, not board, so no need for OnModify() + + int mode = m_dimensionUnits->GetSelection(); m_BrdSettings->m_DimensionUnitsMode = static_cast( mode ); int format = m_dimensionUnitsFormat->GetSelection(); m_BrdSettings->m_DimensionUnitsFormat = static_cast( format ); diff --git a/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp b/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp index d6df0d56e5..2a4ff5d326 100644 --- a/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp +++ b/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp @@ -51,9 +51,9 @@ enum DIFF_VAR_GRID_COLUMNS }; -PANEL_SETUP_TRACKS_AND_VIAS::PANEL_SETUP_TRACKS_AND_VIAS( - PAGED_DIALOG* aParent, PCB_EDIT_FRAME* aFrame, - PANEL_SETUP_FEATURE_CONSTRAINTS* aConstraintsPanel ) : +PANEL_SETUP_TRACKS_AND_VIAS::PANEL_SETUP_TRACKS_AND_VIAS( PAGED_DIALOG* aParent, + PCB_EDIT_FRAME* aFrame, + PANEL_SETUP_FEATURE_CONSTRAINTS* aConstraintsPanel ) : PANEL_SETUP_TRACKS_AND_VIAS_BASE( aParent->GetTreebook() ) { m_Parent = aParent; @@ -197,6 +197,8 @@ bool PANEL_SETUP_TRACKS_AND_VIAS::TransferDataFromWindow() sort( vias.begin(), vias.end() ); sort( diffPairs.begin(), diffPairs.end() ); + // These are all stored in project file, not board, so no need for OnModify() + trackWidths.insert( trackWidths.begin(), 0 ); // dummy value for "use netclass" m_BrdSettings->m_TrackWidthList = trackWidths; diff --git a/pcbnew/pcb_edit_frame.cpp b/pcbnew/pcb_edit_frame.cpp index 799d240dd2..13efe23d28 100644 --- a/pcbnew/pcb_edit_frame.cpp +++ b/pcbnew/pcb_edit_frame.cpp @@ -909,8 +909,6 @@ void PCB_EDIT_FRAME::ShowBoardSetupDialog( const wxString& aInitialPage, const w TOOL_EVENT toolEvent( TC_COMMAND, TA_MODEL_CHANGE, AS_ACTIVE ); toolEvent.SetHasPosition( false ); m_toolManager->ProcessEvent( toolEvent ); - - OnModify(); } GetCanvas()->SetFocus(); diff --git a/pcbnew/plugins/kicad/kicad_plugin.cpp b/pcbnew/plugins/kicad/kicad_plugin.cpp index 04d27e6f79..f3245298f6 100644 --- a/pcbnew/plugins/kicad/kicad_plugin.cpp +++ b/pcbnew/plugins/kicad/kicad_plugin.cpp @@ -465,7 +465,7 @@ void PCB_IO::formatSetup( BOARD* aBoard, int aNestLevel ) const BOARD_STACKUP& stackup = aBoard->GetDesignSettings().GetStackupDescriptor(); if( aBoard->GetDesignSettings().m_HasStackup ) - stackup.FormatBoardStackup( m_out,aBoard, aNestLevel+1 ); + stackup.FormatBoardStackup( m_out, aBoard, aNestLevel+1 ); BOARD_DESIGN_SETTINGS& dsnSettings = aBoard->GetDesignSettings();