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Some extra cleanup for layer interface 

PNS<->Board layer interface needs clear boundaries about where we are
using board layers (with the alternating numbers) and PNS layers which
are sequential and all copper
jobs
Seth Hillbrand 1 year ago
parent
f4bec843d4
commit
1a6b309ad6
6 changed files with 77 additions and 74 deletions
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  1. 66
      pcbnew/router/pns_kicad_iface.cpp
  2. 5
      pcbnew/router/pns_kicad_iface.h
  3. 4
      pcbnew/router/pns_router.h
  4. 60
      pcbnew/router/router_tool.cpp
  5. 10
      pcbnew/router/router_tool.h
  6. 6
      qa/tools/pns/pns_log_viewer_frame.h

66
pcbnew/router/pns_kicad_iface.cpp
View File

@ -143,7 +143,7 @@ public:
void ClearTemporaryCaches() override;
private:
BOARD_ITEM* getBoardItem( const PNS::ITEM* aItem, int aLayer, int aIdx = 0 );
BOARD_ITEM* getBoardItem( const PNS::ITEM* aItem, PCB_LAYER_ID aBoardLayer, int aIdx = 0 );
private:
PNS::ROUTER_IFACE* m_routerIface;
@ -218,7 +218,7 @@ bool PNS_PCBNEW_RULE_RESOLVER::IsNetTieExclusion( const PNS::ITEM* aItem,
if( drcEngine )
{
return drcEngine->IsNetTieExclusion( NetCode( aItem->Net() ),
ToLAYER_ID( m_routerIface->GetBoardLayerFromPNSLayer( aItem->Layer() ) ),
m_routerIface->GetBoardLayerFromPNSLayer( aItem->Layer() ),
aCollisionPos, collidingItem );
}
@ -260,7 +260,9 @@ bool PNS_PCBNEW_RULE_RESOLVER::IsKeepout( const PNS::ITEM* aObstacle, const PNS:
if( zone->GetIsRuleArea() && zone->GetRuleAreaType() == RULE_AREA_TYPE::KEEPOUT )
{
*aEnforce = checkKeepout( zone, getBoardItem( aItem, aObstacle->Layer() ) );
*aEnforce = checkKeepout( zone,
getBoardItem( aItem, m_routerIface->GetBoardLayerFromPNSLayer(
aObstacle->Layer() ) ) );
return true;
}
}
@ -336,12 +338,12 @@ bool PNS_PCBNEW_RULE_RESOLVER::IsNonPlatedSlot( const PNS::ITEM* aItem )
}
BOARD_ITEM* PNS_PCBNEW_RULE_RESOLVER::getBoardItem( const PNS::ITEM* aItem, int aBoardLayer, int aIdx )
BOARD_ITEM* PNS_PCBNEW_RULE_RESOLVER::getBoardItem( const PNS::ITEM* aItem, PCB_LAYER_ID aBoardLayer, int aIdx )
{
switch( aItem->Kind() )
{
case PNS::ITEM::ARC_T:
m_dummyArcs[aIdx].SetLayer( ToLAYER_ID( aBoardLayer ) );
m_dummyArcs[aIdx].SetLayer( aBoardLayer );
m_dummyArcs[aIdx].SetNet( static_cast<NETINFO_ITEM*>( aItem->Net() ) );
m_dummyArcs[aIdx].SetStart( aItem->Anchor( 0 ) );
m_dummyArcs[aIdx].SetEnd( aItem->Anchor( 1 ) );
@ -349,14 +351,14 @@ BOARD_ITEM* PNS_PCBNEW_RULE_RESOLVER::getBoardItem( const PNS::ITEM* aItem, int
case PNS::ITEM::VIA_T:
case PNS::ITEM::HOLE_T:
m_dummyVias[aIdx].SetLayer( ToLAYER_ID( aBoardLayer ) );
m_dummyVias[aIdx].SetLayer( aBoardLayer );
m_dummyVias[aIdx].SetNet( static_cast<NETINFO_ITEM*>( aItem->Net() ) );
m_dummyVias[aIdx].SetStart( aItem->Anchor( 0 ) );
return &m_dummyVias[aIdx];
case PNS::ITEM::SEGMENT_T:
case PNS::ITEM::LINE_T:
m_dummyTracks[aIdx].SetLayer( ToLAYER_ID( aBoardLayer ) );
m_dummyTracks[aIdx].SetLayer( aBoardLayer );
m_dummyTracks[aIdx].SetNet( static_cast<NETINFO_ITEM*>( aItem->Net() ) );
m_dummyTracks[aIdx].SetStart( aItem->Anchor( 0 ) );
m_dummyTracks[aIdx].SetEnd( aItem->Anchor( 1 ) );
@ -398,7 +400,7 @@ bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint( PNS::CONSTRAINT_TYPE aType,
BOARD_ITEM* parentA = aItemA ? aItemA->BoardItem() : nullptr;
BOARD_ITEM* parentB = aItemB ? aItemB->BoardItem() : nullptr;
int board_layer = m_routerIface->GetBoardLayerFromPNSLayer( aPNSLayer );
PCB_LAYER_ID board_layer = m_routerIface->GetBoardLayerFromPNSLayer( aPNSLayer );
DRC_CONSTRAINT hostConstraint;
// A track being routed may not have a BOARD_ITEM associated yet.
@ -409,7 +411,7 @@ bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint( PNS::CONSTRAINT_TYPE aType,
parentB = getBoardItem( aItemB, board_layer, 1 );
if( parentA )
hostConstraint = drcEngine->EvalRules( hostType, parentA, parentB, ToLAYER_ID( board_layer ) );
hostConstraint = drcEngine->EvalRules( hostType, parentA, parentB, board_layer );
if( hostConstraint.IsNull() )
return false;
@ -679,7 +681,7 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM*
{
PNS::SEGMENT dummyTrack;
dummyTrack.SetEnds( aStartItem->Anchor( startAnchor ), aStartItem->Anchor( startAnchor ) );
dummyTrack.SetLayer( ToLAYER_ID( m_startLayer ) );
dummyTrack.SetLayer( m_startLayer );
dummyTrack.SetNet( static_cast<NETINFO_ITEM*>( aStartItem->Net() ) );
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_CLEARANCE, &dummyTrack,
@ -709,7 +711,7 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM*
{
PNS::SEGMENT dummyTrack;
dummyTrack.SetEnds( aStartItem->Anchor( startAnchor ), aStartItem->Anchor( startAnchor ) );
dummyTrack.SetLayer( ToLAYER_ID( m_startLayer ) );
dummyTrack.SetLayer( m_startLayer );
dummyTrack.SetNet( static_cast<NETINFO_ITEM*>( aStartItem->Net() ) );
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_WIDTH, &dummyTrack, nullptr,
@ -791,12 +793,12 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM*
PNS::SEGMENT dummyTrack;
dummyTrack.SetEnds( aStartItem->Anchor( 0 ), aStartItem->Anchor( 0 ) );
dummyTrack.SetLayer( ToLAYER_ID( m_startLayer ) );
dummyTrack.SetLayer( m_startLayer );
dummyTrack.SetNet( static_cast<NETINFO_ITEM*>( aStartItem->Net() ) );
PNS::SEGMENT coupledTrack;
dummyTrack.SetEnds( aStartItem->Anchor( 0 ), aStartItem->Anchor( 0 ) );
dummyTrack.SetLayer( ToLAYER_ID( m_startLayer ) );
dummyTrack.SetLayer( m_startLayer );
dummyTrack.SetNet( static_cast<NETINFO_ITEM*>( coupledNet ) );
if( !found
@ -863,8 +865,8 @@ int PNS_KICAD_IFACE_BASE::StackupHeight( int aFirstLayer, int aSecondLayer ) con
BOARD_STACKUP& stackup = m_board->GetDesignSettings().GetStackupDescriptor();
return stackup.GetLayerDistance( GetPCBLayerIDFromPNSLayer( aFirstLayer ),
GetPCBLayerIDFromPNSLayer( aSecondLayer ) );
return stackup.GetLayerDistance( GetBoardLayerFromPNSLayer( aFirstLayer ),
GetBoardLayerFromPNSLayer( aSecondLayer ) );
}
@ -1464,14 +1466,14 @@ bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer( const PNS::ITEM* aItem, int aLayer
{
const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem->Parent() );
return via->FlashLayer( GetPCBLayerIDFromPNSLayer( aLayer ) );
return via->FlashLayer( GetBoardLayerFromPNSLayer( aLayer ) );
}
case PCB_PAD_T:
{
const PAD* pad = static_cast<const PAD*>( aItem->Parent() );
return pad->FlashLayer( GetPCBLayerIDFromPNSLayer( aLayer ) );
return pad->FlashLayer( GetBoardLayerFromPNSLayer( aLayer ) );
}
default:
@ -1498,7 +1500,7 @@ bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer( const PNS::ITEM* aItem,
for( int layer = test.Start(); layer <= test.End(); ++layer )
{
if( via->FlashLayer( GetPCBLayerIDFromPNSLayer( layer ) ) )
if( via->FlashLayer( GetBoardLayerFromPNSLayer( layer ) ) )
return true;
}
@ -1511,7 +1513,7 @@ bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer( const PNS::ITEM* aItem,
for( int layer = test.Start(); layer <= test.End(); ++layer )
{
if( pad->FlashLayer( GetPCBLayerIDFromPNSLayer( layer ) ) )
if( pad->FlashLayer( GetBoardLayerFromPNSLayer( layer ) ) )
return true;
}
@ -1908,8 +1910,8 @@ void PNS_KICAD_IFACE::modifyBoardItem( PNS::ITEM* aItem )
via_board->SetNet( static_cast<NETINFO_ITEM*>( via->Net() ) );
via_board->SetViaType( via->ViaType() ); // MUST be before SetLayerPair()
via_board->SetIsFree( via->IsFree() );
via_board->SetLayerPair( GetPCBLayerIDFromPNSLayer( via->Layers().Start() ),
GetPCBLayerIDFromPNSLayer( via->Layers().End() ) );
via_board->SetLayerPair( GetBoardLayerFromPNSLayer( via->Layers().Start() ),
GetBoardLayerFromPNSLayer( via->Layers().End() ) );
break;
}
@ -1958,7 +1960,7 @@ BOARD_CONNECTED_ITEM* PNS_KICAD_IFACE::createBoardItem( PNS::ITEM* aItem )
PNS::ARC* arc = static_cast<PNS::ARC*>( aItem );
PCB_ARC* new_arc = new PCB_ARC( m_board, static_cast<const SHAPE_ARC*>( arc->Shape() ) );
new_arc->SetWidth( arc->Width() );
new_arc->SetLayer( GetPCBLayerIDFromPNSLayer( arc->Layers().Start() ) );
new_arc->SetLayer( GetBoardLayerFromPNSLayer( arc->Layers().Start() ) );
new_arc->SetNet( net );
newBoardItem = new_arc;
break;
@ -1972,7 +1974,7 @@ BOARD_CONNECTED_ITEM* PNS_KICAD_IFACE::createBoardItem( PNS::ITEM* aItem )
track->SetStart( VECTOR2I( s.A.x, s.A.y ) );
track->SetEnd( VECTOR2I( s.B.x, s.B.y ) );
track->SetWidth( seg->Width() );
track->SetLayer( GetPCBLayerIDFromPNSLayer( seg->Layers().Start() ) );
track->SetLayer( GetBoardLayerFromPNSLayer( seg->Layers().Start() ) );
track->SetNet( net );
newBoardItem = track;
break;
@ -1988,8 +1990,8 @@ BOARD_CONNECTED_ITEM* PNS_KICAD_IFACE::createBoardItem( PNS::ITEM* aItem )
via_board->SetNet( net );
via_board->SetViaType( via->ViaType() ); // MUST be before SetLayerPair()
via_board->SetIsFree( via->IsFree() );
via_board->SetLayerPair( GetPCBLayerIDFromPNSLayer( via->Layers().Start() ),
GetPCBLayerIDFromPNSLayer( via->Layers().End() ) );
via_board->SetLayerPair( GetBoardLayerFromPNSLayer( via->Layers().Start() ),
GetBoardLayerFromPNSLayer( via->Layers().End() ) );
newBoardItem = via_board;
break;
}
@ -2139,10 +2141,10 @@ void PNS_KICAD_IFACE::SetHostTool( PCB_TOOL_BASE* aTool )
}
int PNS_KICAD_IFACE_BASE::GetBoardLayerFromPNSLayer( int aLayer ) const
PCB_LAYER_ID PNS_KICAD_IFACE_BASE::GetBoardLayerFromPNSLayer( int aLayer ) const
{
if( aLayer < 0 )
return -1;
return PCB_LAYER_ID::UNDEFINED_LAYER;
if( aLayer == 0 )
return F_Cu;
@ -2150,11 +2152,11 @@ int PNS_KICAD_IFACE_BASE::GetBoardLayerFromPNSLayer( int aLayer ) const
if( aLayer == m_board->GetCopperLayerCount() - 1 )
return B_Cu;
return ( aLayer + 1 ) * 2;
return static_cast<PCB_LAYER_ID>( ( aLayer + 1 ) * 2 );
}
int PNS_KICAD_IFACE_BASE::GetPNSLayerFromBoardLayer( int aLayer ) const
int PNS_KICAD_IFACE_BASE::GetPNSLayerFromBoardLayer( PCB_LAYER_ID aLayer ) const
{
if( aLayer < 0 )
return -1;
@ -2169,12 +2171,6 @@ int PNS_KICAD_IFACE_BASE::GetPNSLayerFromBoardLayer( int aLayer ) const
}
PCB_LAYER_ID PNS_KICAD_IFACE_BASE::GetPCBLayerIDFromPNSLayer( int aLayer ) const
{
return static_cast<PCB_LAYER_ID>( GetBoardLayerFromPNSLayer( aLayer ) );
}
void PNS_KICAD_IFACE_BASE::SetStartLayerFromPCBNew( PCB_LAYER_ID aLayer )
{
m_startLayer = GetPNSLayerFromBoardLayer( aLayer );

5
pcbnew/router/pns_kicad_iface.h
View File

@ -81,9 +81,8 @@ public:
void SetDebugDecorator( PNS::DEBUG_DECORATOR* aDec );
int GetBoardLayerFromPNSLayer( int aLayer ) const override;
int GetPNSLayerFromBoardLayer( int aLayer ) const override;
PCB_LAYER_ID GetPCBLayerIDFromPNSLayer( int aLayer ) const;
PCB_LAYER_ID GetBoardLayerFromPNSLayer( int aLayer ) const override;
int GetPNSLayerFromBoardLayer( PCB_LAYER_ID aLayer ) const override;
void SetStartLayerFromPCBNew( PCB_LAYER_ID aLayer );
void SetStartLayerFromPNS( int aLayer ) { m_startLayer = aLayer; }

4
pcbnew/router/pns_router.h
View File

@ -116,8 +116,8 @@ enum DRAG_MODE
virtual RULE_RESOLVER* GetRuleResolver() = 0;
virtual DEBUG_DECORATOR* GetDebugDecorator() = 0;
virtual int GetBoardLayerFromPNSLayer( int aLayer ) const = 0;
virtual int GetPNSLayerFromBoardLayer( int aLayer ) const = 0;
virtual PCB_LAYER_ID GetBoardLayerFromPNSLayer( int aLayer ) const = 0;
virtual int GetPNSLayerFromBoardLayer( PCB_LAYER_ID aLayer ) const = 0;
};
class ROUTER

60
pcbnew/router/router_tool.cpp
View File

@ -682,18 +682,19 @@ void ROUTER_TOOL::handleCommonEvents( TOOL_EVENT& aEvent )
}
int ROUTER_TOOL::getStartLayer( const PNS::ITEM* aItem )
PCB_LAYER_ID ROUTER_TOOL::getStartLayer( const PNS::ITEM* aItem )
{
int tl = getView()->GetTopLayer();
PCB_LAYER_ID tl = static_cast<PCB_LAYER_ID>( getView()->GetTopLayer() );
if( m_startItem )
{
int startLayer = m_iface->GetPNSLayerFromBoardLayer( tl );
const PNS_LAYER_RANGE& ls = m_startItem->Layers();
if( ls.Overlaps( tl ) )
if( ls.Overlaps( startLayer ) )
return tl;
else
return ls.Start();
return m_iface->GetBoardLayerFromPNSLayer( ls.Start() );
}
return tl;
@ -714,9 +715,9 @@ void ROUTER_TOOL::switchLayerOnViaPlacement()
newLayer = m_router->Sizes().GetLayerTop();
m_router->SwitchLayer( *newLayer );
m_lastTargetLayer = *newLayer;
m_lastTargetLayer = m_iface->GetBoardLayerFromPNSLayer( *newLayer );
updateSizesAfterRouterEvent( ToLAYER_ID( *newLayer ), m_endSnapPoint );
updateSizesAfterRouterEvent( *newLayer, m_endSnapPoint );
UpdateMessagePanel();
}
@ -730,7 +731,7 @@ void ROUTER_TOOL::updateSizesAfterRouterEvent( int aTargetLayer, const VECTOR2I&
BOARD_DESIGN_SETTINGS& bds = board()->GetDesignSettings();
std::shared_ptr<DRC_ENGINE>& drcEngine = bds.m_DRCEngine;
DRC_CONSTRAINT constraint;
PCB_LAYER_ID targetLayer = m_iface->GetPCBLayerIDFromPNSLayer( aTargetLayer );
PCB_LAYER_ID targetLayer = m_iface->GetBoardLayerFromPNSLayer( aTargetLayer );
PCB_TRACK dummyTrack( board() );
dummyTrack.SetFlags( ROUTER_TRANSIENT );
@ -856,7 +857,8 @@ int ROUTER_TOOL::onViaCommand( const TOOL_EVENT& aEvent )
else
{
m_router->ToggleViaPlacement();
frame()->SetActiveLayer( static_cast<PCB_LAYER_ID>( m_router->GetCurrentLayer() ) );
frame()->SetActiveLayer(
m_iface->GetBoardLayerFromPNSLayer( m_router->GetCurrentLayer() ) );
updateEndItem( aEvent );
m_router->Move( m_endSnapPoint, m_endItem );
}
@ -879,17 +881,17 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
LSEQ layers = enabledLayers.Seq();
// These layers are in Board Layer order not PNS layer order
PCB_LAYER_ID currentLayer = m_iface->GetPCBLayerIDFromPNSLayer( m_router->GetCurrentLayer() );
PCB_LAYER_ID currentLayer = m_iface->GetBoardLayerFromPNSLayer( m_router->GetCurrentLayer() );
PCB_LAYER_ID targetLayer = UNDEFINED_LAYER;
if( aEvent.IsAction( &PCB_ACTIONS::layerNext ) )
{
if( m_lastTargetLayer == UNDEFINED_LAYER )
m_lastTargetLayer = m_iface->GetPNSLayerFromBoardLayer( currentLayer );
m_lastTargetLayer = currentLayer;
size_t idx = 0;
size_t target_idx = 0;
PCB_LAYER_ID lastTargetLayer = m_iface->GetPCBLayerIDFromPNSLayer( m_lastTargetLayer );
PCB_LAYER_ID lastTargetLayer = m_lastTargetLayer;
for( size_t i = 0; i < layers.size(); i++ )
{
@ -905,7 +907,7 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
// idx + 1 layer may be invisible, switches to next visible layer
for( size_t i = 0; i < layers.size() - 1; i++ )
{
if( brd->IsLayerVisible( static_cast<PCB_LAYER_ID>( layers[target_idx] ) ) )
if( brd->IsLayerVisible( layers[target_idx] ) )
{
targetLayer = layers[target_idx];
break;
@ -931,7 +933,7 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
size_t idx = 0;
size_t target_idx = 0;
PCB_LAYER_ID lastTargetLayer = m_iface->GetPCBLayerIDFromPNSLayer( m_lastTargetLayer );
PCB_LAYER_ID lastTargetLayer = m_lastTargetLayer;
for( size_t i = 0; i < layers.size(); i++ )
{
@ -946,7 +948,7 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
for( size_t i = 0; i < layers.size() - 1; i++ )
{
if( brd->IsLayerVisible( static_cast<PCB_LAYER_ID>( layers[target_idx] ) ) )
if( brd->IsLayerVisible( layers[target_idx] ) )
{
targetLayer = layers[target_idx];
break;
@ -983,7 +985,7 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
if( targetLayer != UNDEFINED_LAYER )
{
m_lastTargetLayer = m_iface->GetPNSLayerFromBoardLayer( targetLayer );
m_lastTargetLayer = targetLayer;
if( targetLayer == currentLayer )
return 0;
@ -1135,7 +1137,7 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
if( !m_router->IsPlacingVia() )
m_router->ToggleViaPlacement();
m_lastTargetLayer = m_iface->GetPNSLayerFromBoardLayer( targetLayer );
m_lastTargetLayer = targetLayer;
if( m_router->RoutingInProgress() )
{
@ -1154,26 +1156,27 @@ int ROUTER_TOOL::handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia )
bool ROUTER_TOOL::prepareInteractive( VECTOR2D aStartPosition )
{
PCB_EDIT_FRAME* editFrame = getEditFrame<PCB_EDIT_FRAME>();
int routingLayer = getStartLayer( m_startItem );
PCB_LAYER_ID pcbLayer = getStartLayer( m_startItem );
int pnsLayer = m_iface->GetPNSLayerFromBoardLayer( pcbLayer );
if( !IsCopperLayer( routingLayer ) )
if( !IsCopperLayer( pcbLayer ) )
{
editFrame->ShowInfoBarError( _( "Tracks on Copper layers only." ) );
return false;
}
m_originalActiveLayer = editFrame->GetActiveLayer();
editFrame->SetActiveLayer( ToLAYER_ID( routingLayer ) );
editFrame->SetActiveLayer( pcbLayer );
if( !getView()->IsLayerVisible( routingLayer ) )
if( !getView()->IsLayerVisible( pcbLayer ) )
{
editFrame->GetAppearancePanel()->SetLayerVisible( routingLayer, true );
editFrame->GetAppearancePanel()->SetLayerVisible( pcbLayer, true );
editFrame->GetCanvas()->Refresh();
}
PNS::SIZES_SETTINGS sizes( m_router->Sizes() );
m_iface->SetStartLayerFromPNS( routingLayer );
m_iface->SetStartLayerFromPCBNew( pcbLayer );
frame()->GetBoard()->GetDesignSettings().m_TempOverrideTrackWidth = false;
m_iface->ImportSizes( sizes, m_startItem, nullptr, aStartPosition );
@ -1197,7 +1200,7 @@ bool ROUTER_TOOL::prepareInteractive( VECTOR2D aStartPosition )
controls()->SetAutoPan( true );
if( !m_router->StartRouting( m_startSnapPoint, m_startItem, routingLayer ) )
if( !m_router->StartRouting( m_startSnapPoint, m_startItem, pnsLayer ) )
{
// It would make more sense to leave the net highlighted as the higher-contrast mode
// makes the router clearances more visible. However, since we just started routing
@ -1232,7 +1235,7 @@ bool ROUTER_TOOL::finishInteractive()
m_startItem = nullptr;
m_endItem = nullptr;
frame()->SetActiveLayer( m_iface->GetPCBLayerIDFromPNSLayer( m_originalActiveLayer ) );
frame()->SetActiveLayer( m_originalActiveLayer );
UpdateMessagePanel();
frame()->GetCanvas()->SetCurrentCursor( KICURSOR::ARROW );
controls()->SetAutoPan( false );
@ -1260,14 +1263,15 @@ void ROUTER_TOOL::performRouting( VECTOR2D aStartPosition )
auto syncRouterAndFrameLayer =
[&]()
{
PCB_LAYER_ID routingLayer = ToLAYER_ID( m_router->GetCurrentLayer() );
int pnsLayer = m_router->GetCurrentLayer();
PCB_LAYER_ID pcbLayer = m_iface->GetBoardLayerFromPNSLayer( pnsLayer );
PCB_EDIT_FRAME* editFrame = getEditFrame<PCB_EDIT_FRAME>();
editFrame->SetActiveLayer( routingLayer );
editFrame->SetActiveLayer( pcbLayer );
if( !getView()->IsLayerVisible( routingLayer ) )
if( !getView()->IsLayerVisible( pcbLayer ) )
{
editFrame->GetAppearancePanel()->SetLayerVisible( routingLayer, true );
editFrame->GetAppearancePanel()->SetLayerVisible( pcbLayer, true );
editFrame->GetCanvas()->Refresh();
}
};

10
pcbnew/router/router_tool.h
View File

@ -77,7 +77,9 @@ private:
void handleCommonEvents( TOOL_EVENT& evt );
int handleLayerSwitch( const TOOL_EVENT& aEvent, bool aForceVia );
int getStartLayer( const PNS::ITEM* aItem );
// Returns the board layer ID for the start layer of the router
PCB_LAYER_ID getStartLayer( const PNS::ITEM* aItem );
void switchLayerOnViaPlacement();
void updateSizesAfterRouterEvent( int targetLayer, const VECTOR2I& aPos );
@ -93,8 +95,10 @@ private:
std::shared_ptr<ACTION_MENU> m_diffPairMenu;
std::shared_ptr<ACTION_MENU> m_trackViaMenu;
int m_lastTargetLayer;
int m_originalActiveLayer;
// Both of these are in board layer ID format and must be converted to PNS layer ID format
// when used with the PNS interface.
PCB_LAYER_ID m_lastTargetLayer;
PCB_LAYER_ID m_originalActiveLayer;
bool m_inRouterTool; // Re-entrancy guard
};

6
qa/tools/pns/pns_log_viewer_frame.h
View File

@ -81,7 +81,7 @@ public:
PNS::RULE_RESOLVER* GetRuleResolver() override { return nullptr; }
PNS::DEBUG_DECORATOR* GetDebugDecorator() override { return nullptr; }
int GetBoardLayerFromPNSLayer( int aLayer ) const override
PCB_LAYER_ID GetBoardLayerFromPNSLayer( int aLayer ) const override
{
if( aLayer == 0 )
return F_Cu;
@ -89,11 +89,11 @@ public:
if( aLayer == m_board->GetCopperLayerCount() - 1 )
return B_Cu;
return ( aLayer + 1 ) * 2;
return ToLAYER_ID( ( aLayer + 1 ) * 2 );
}
int GetPNSLayerFromBoardLayer( int aLayer ) const override
int GetPNSLayerFromBoardLayer( PCB_LAYER_ID aLayer ) const override
{
if( aLayer == F_Cu )
return 0;

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