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Demos update

merge-requests/41/merge
jean-pierre charras 6 years ago
parent
eaaa4eb63a
commit
18d4112fce
16 changed files with 8738 additions and 7455 deletions
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  1. 84
      demos/complex_hierarchy/ampli_ht.sch
  2. 46
      demos/complex_hierarchy/complex_hierarchy-cache.lib
  3. 4510
      demos/complex_hierarchy/complex_hierarchy.kicad_pcb
  4. 265
      demos/complex_hierarchy/complex_hierarchy.pro
  5. 64
      demos/complex_hierarchy/complex_hierarchy.sch
  6. 88
      demos/complex_hierarchy/complex_hierarchy_schlib.lib
  7. 1
      demos/complex_hierarchy/fp-lib-table
  8. 8
      demos/interf_u/interf_u-cache.lib
  9. 4486
      demos/interf_u/interf_u.kicad_pcb
  10. 265
      demos/interf_u/interf_u.pro
  11. 20
      demos/interf_u/interf_u.sch
  12. 6
      demos/kit-dev-coldfire-xilinx_5213/in_out_conn.sch
  13. 2
      demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213-cache.lib
  14. 6305
      demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213.kicad_pcb
  15. 2
      demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213.pro
  16. 41
      demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire.pretty/DB9FC.kicad_mod

84
demos/complex_hierarchy/ampli_ht.sch
View File

@ -1,6 +1,5 @@
EESchema Schematic File Version 5
LIBS:complex_hierarchy-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@ -13,6 +12,11 @@ Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
Comment5 ""
Comment6 ""
Comment7 ""
Comment8 ""
Comment9 ""
$EndDescr
Wire Wire Line
8900 6400 6100 6400
@ -166,7 +170,7 @@ AR Path="/4B3A13A4/4B6168A3" Ref="#PWR019" Part="1"
AR Path="/4B3A1333/4B6168A3" Ref="#PWR035" Part="1"
F 0 "#PWR019" H 8100 5950 30 0001 C CNN
F 1 "GND" H 8100 5880 30 0001 C CNN
F 2 "" H 8100 5950 60 0001 C CNN
F 2 "" H 8100 5950 10 0001 C CNN
F 3 "" H 8100 5950 60 0001 C CNN
1 8100 5950
1 0 0 -1
@ -179,7 +183,7 @@ AR Path="/4B3A1333/4B61688C" Ref="R10" Part="1"
AR Path="/4B3A13A4/4B61688C" Ref="R20" Part="1"
F 0 "R20" V 8180 5250 50 0000 C CNN
F 1 "5,6K" V 8100 5250 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 8226 5259 20 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 8226 5259 10 0000 C CNN
F 3 "" H 8100 5250 60 0001 C CNN
1 8100 5250
1 0 0 -1
@ -192,7 +196,7 @@ AR Path="/4B3A1333/4B4F364A" Ref="#PWR036" Part="1"
AR Path="/4B3A13A4/4B4F364A" Ref="#PWR020" Part="1"
F 0 "#PWR020" H 2850 2450 30 0001 C CNN
F 1 "GND" H 2850 2380 30 0001 C CNN
F 2 "" H 2850 2450 60 0001 C CNN
F 2 "" H 2850 2450 10 0001 C CNN
F 3 "" H 2850 2450 60 0001 C CNN
1 2850 2450
1 0 0 -1
@ -205,7 +209,7 @@ AR Path="/4B3A1333/4B4F3641" Ref="C12" Part="1"
AR Path="/4B3A13A4/4B4F3641" Ref="C14" Part="1"
F 0 "C14" H 3000 2300 50 0000 L CNN
F 1 "150nF" H 3000 2200 50 0000 L CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 3150 2150 15 0000 C CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 3150 2150 10 0000 C CNN
F 3 "" H 2850 2250 60 0001 C CNN
1 2850 2250
1 0 0 -1
@ -218,7 +222,7 @@ AR Path="/4B3A1333/4B4F363E" Ref="R23" Part="1"
AR Path="/4B3A13A4/4B4F363E" Ref="R24" Part="1"
F 0 "R24" V 2350 2000 50 0000 C CNN
F 1 "1K" V 2450 2000 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 2300 2000 15 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 2300 2000 10 0000 C CNN
F 3 "" H 2450 2000 60 0001 C CNN
1 2450 2000
0 1 1 0
@ -231,7 +235,7 @@ AR Path="/4B3A13A4/4B4B1086" Ref="#PWR021" Part="1"
AR Path="/4B3A1333/4B4B1086" Ref="#PWR037" Part="1"
F 0 "#PWR021" H 6300 5950 20 0001 C CNN
F 1 "-VAA" H 6300 5950 40 0000 C CNN
F 2 "" H 6300 5850 60 0001 C CNN
F 2 "" H 6300 5850 10 0001 C CNN
F 3 "" H 6300 5850 60 0001 C CNN
1 6300 5850
-1 0 0 1
@ -244,7 +248,7 @@ AR Path="/4B3A13A4/4B4B1080" Ref="#PWR022" Part="1"
AR Path="/4B3A1333/4B4B1080" Ref="#PWR038" Part="1"
F 0 "#PWR022" H 4750 2950 20 0001 C CNN
F 1 "-VAA" H 4750 2950 40 0000 C CNN
F 2 "" H 4750 2850 60 0001 C CNN
F 2 "" H 4750 2850 10 0001 C CNN
F 3 "" H 4750 2850 60 0001 C CNN
1 4750 2850
-1 0 0 1
@ -262,8 +266,8 @@ P 8500 3700
AR Path="/4B3A13A4/4B3A137D" Ref="Q6" Part="1"
AR Path="/4B3A1333/4B3A137D" Ref="Q2" Part="1"
F 0 "Q6" H 8500 3950 50 0000 R CNN
F 1 "MPAS42" H 8500 3850 50 0000 R CNN
F 2 "Discret:TO92-CBE" H 8300 3800 20 0000 C CNN
F 1 "MPSA42" H 8500 3850 50 0000 R CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 8300 3800 10 0000 C CNN
F 3 "" H 8500 3700 60 0001 C CNN
1 8500 3700
1 0 0 -1
@ -275,8 +279,8 @@ P 8500 4800
AR Path="/4B3A13A4/4B3A137C" Ref="Q7" Part="1"
AR Path="/4B3A1333/4B3A137C" Ref="Q3" Part="1"
F 0 "Q7" H 8500 4650 60 0000 R CNN
F 1 "MPAS92" H 8500 4950 60 0000 R CNN
F 2 "Discret:TO92-CBE" H 8450 5000 20 0000 C CNN
F 1 "MPSA92" H 8500 4950 60 0000 R CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 8450 5000 10 0000 C CNN
F 3 "" H 8500 4800 60 0001 C CNN
1 8500 4800
1 0 0 1
@ -302,7 +306,7 @@ AR Path="/4B3A13A4/4B3A137A" Ref="#PWR023" Part="1"
AR Path="/4B3A1333/4B3A137A" Ref="#PWR039" Part="1"
F 0 "#PWR023" H 8600 5300 30 0001 C CNN
F 1 "GND" H 8600 5230 30 0001 C CNN
F 2 "" H 8600 5300 60 0001 C CNN
F 2 "" H 8600 5300 10 0001 C CNN
F 3 "" H 8600 5300 60 0001 C CNN
1 8600 5300
1 0 0 -1
@ -314,8 +318,8 @@ P 7800 5100
AR Path="/4B3A13A4/4B3A1379" Ref="Q8" Part="1"
AR Path="/4B3A1333/4B3A1379" Ref="Q4" Part="1"
F 0 "Q8" H 7800 4950 50 0000 R CNN
F 1 "MPAS42" H 7800 5250 50 0000 R CNN
F 2 "Discret:TO92-CBE" H 7750 4900 20 0000 C CNN
F 1 "MPSA42" H 7800 5250 50 0000 R CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 7750 4900 10 0000 C CNN
F 3 "" H 7800 5100 60 0001 C CNN
1 7800 5100
1 0 0 -1
@ -328,7 +332,7 @@ AR Path="/4B3A13A4/4B3A1378" Ref="#PWR024" Part="1"
AR Path="/4B3A1333/4B3A1378" Ref="#PWR040" Part="1"
F 0 "#PWR024" H 7000 5200 30 0001 C CNN
F 1 "GND" H 7000 5130 30 0001 C CNN
F 2 "" H 7000 5200 60 0001 C CNN
F 2 "" H 7000 5200 10 0001 C CNN
F 3 "" H 7000 5200 60 0001 C CNN
1 7000 5200
1 0 0 -1
@ -393,7 +397,7 @@ AR Path="/4B3A13A4/4B3A1373" Ref="#PWR025" Part="1"
AR Path="/4B3A1333/4B3A1373" Ref="#PWR041" Part="1"
F 0 "#PWR025" H 7300 3850 30 0001 C CNN
F 1 "GND" H 7300 3780 30 0001 C CNN
F 2 "" H 7300 3850 60 0001 C CNN
F 2 "" H 7300 3850 10 0001 C CNN
F 3 "" H 7300 3850 60 0001 C CNN
1 7300 3850
1 0 0 -1
@ -406,7 +410,7 @@ AR Path="/4B3A13A4/4B3A1371" Ref="R18" Part="1"
AR Path="/4B3A1333/4B3A1371" Ref="R8" Part="1"
F 0 "R18" V 7150 5100 50 0000 C CNN
F 1 "1K" V 7250 5100 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 7100 5100 20 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 7100 5100 10 0000 C CNN
F 3 "" H 7250 5100 60 0001 C CNN
1 7250 5100
0 1 1 0
@ -432,7 +436,7 @@ AR Path="/4B3A13A4/4B3A136F" Ref="#U026" Part="1"
AR Path="/4B3A1333/4B3A136F" Ref="#U042" Part="1"
F 0 "#U026" H 6300 4900 20 0001 C CNN
F 1 "+12V" H 6300 5050 40 0000 C CNN
F 2 "" H 6300 4950 60 0001 C CNN
F 2 "" H 6300 4950 10 0001 C CNN
F 3 "" H 6300 4950 60 0001 C CNN
1 6300 4950
1 0 0 -1
@ -445,7 +449,7 @@ AR Path="/4B3A13A4/4B3A136D" Ref="R19" Part="1"
AR Path="/4B3A1333/4B3A136D" Ref="R9" Part="1"
F 0 "R19" V 7300 5400 50 0000 C CNN
F 1 "1K" V 7400 5400 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 7475 5422 15 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 7475 5422 10 0000 C CNN
F 3 "" H 7400 5400 60 0001 C CNN
1 7400 5400
0 1 1 0
@ -473,7 +477,7 @@ AR Path="/4B3A13A4/4B3A136B" Ref="R16" Part="1"
AR Path="/4B3A1333/4B3A136B" Ref="R6" Part="1"
F 0 "R16" V 3150 2000 50 0000 C CNN
F 1 "22K" V 3250 2000 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 3350 2050 15 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 3350 2050 10 0000 C CNN
F 3 "" H 3250 2000 60 0001 C CNN
1 3250 2000
0 1 1 0
@ -486,7 +490,7 @@ AR Path="/4B3A13A4/4B3A136A" Ref="#PWR027" Part="1"
AR Path="/4B3A1333/4B3A136A" Ref="#PWR043" Part="1"
F 0 "#PWR027" H 1800 2250 30 0001 C CNN
F 1 "GND" H 1800 2180 30 0001 C CNN
F 2 "" H 1800 2250 60 0001 C CNN
F 2 "" H 1800 2250 10 0001 C CNN
F 3 "" H 1800 2250 60 0001 C CNN
1 1800 2250
1 0 0 -1
@ -499,7 +503,7 @@ AR Path="/4B3A13A4/4B3A1369" Ref="#PWR028" Part="1"
AR Path="/4B3A1333/4B3A1369" Ref="#PWR044" Part="1"
F 0 "#PWR028" H 4000 2750 30 0001 C CNN
F 1 "GND" H 4000 2680 30 0001 C CNN
F 2 "" H 4000 2750 60 0001 C CNN
F 2 "" H 4000 2750 10 0001 C CNN
F 3 "" H 4000 2750 60 0001 C CNN
1 4000 2750
1 0 0 -1
@ -512,7 +516,7 @@ AR Path="/4B3A13A4/4B3A1368" Ref="U4" Part="1"
AR Path="/4B3A1333/4B3A1368" Ref="U3" Part="1"
F 0 "U4" H 6450 5600 60 0000 C CNN
F 1 "LM358N" H 6550 5200 50 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 6650 5150 20 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 6650 5150 10 0000 C CNN
F 3 "" H 6400 5400 60 0001 C CNN
1 6400 5400
1 0 0 -1
@ -551,7 +555,7 @@ AR Path="/4B3A13A4/4B3A1365" Ref="C8" Part="1"
AR Path="/4B3A1333/4B3A1365" Ref="C5" Part="1"
F 0 "C8" H 8150 5850 50 0000 L CNN
F 1 "820pF" H 8150 5650 50 0000 L CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 8300 5600 15 0000 C CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 8300 5600 10 0000 C CNN
F 3 "" H 8100 5750 60 0001 C CNN
1 8100 5750
1 0 0 -1
@ -564,7 +568,7 @@ AR Path="/4B3A13A4/4B3A1364" Ref="R15" Part="1"
AR Path="/4B3A1333/4B3A1364" Ref="R5" Part="1"
F 0 "R15" V 9530 4150 50 0000 C CNN
F 1 "47" V 9450 4150 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 9400 4150 20 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 9400 4150 10 0000 C CNN
F 3 "" H 9450 4150 60 0001 C CNN
1 9450 4150
0 1 1 0
@ -577,7 +581,7 @@ AR Path="/4B3A13A4/4B3A1363" Ref="#PWR029" Part="1"
AR Path="/4B3A1333/4B3A1363" Ref="#PWR045" Part="1"
F 0 "#PWR029" H 10250 4550 30 0001 C CNN
F 1 "GND" H 10250 4480 30 0001 C CNN
F 2 "" H 10250 4550 60 0001 C CNN
F 2 "" H 10250 4550 10 0001 C CNN
F 3 "" H 10250 4550 60 0001 C CNN
1 10250 4550
1 0 0 -1
@ -590,7 +594,7 @@ AR Path="/4B3A13A4/4B3A1362" Ref="R21" Part="1"
AR Path="/4B3A1333/4B3A1362" Ref="R11" Part="1"
F 0 "R21" V 5150 6400 50 0000 C CNN
F 1 "4,7K" V 5250 6400 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 5100 6400 15 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 5100 6400 10 0000 C CNN
F 3 "" H 5250 6400 60 0001 C CNN
1 5250 6400
0 1 1 0
@ -603,7 +607,7 @@ AR Path="/4B3A13A4/4B3A1361" Ref="#PWR030" Part="1"
AR Path="/4B3A1333/4B3A1361" Ref="#PWR046" Part="1"
F 0 "#PWR030" H 5050 6400 30 0001 C CNN
F 1 "GND" H 5050 6330 30 0001 C CNN
F 2 "" H 5050 6400 60 0001 C CNN
F 2 "" H 5050 6400 10 0001 C CNN
F 3 "" H 5050 6400 60 0001 C CNN
1 5050 6400
0 1 1 0
@ -615,8 +619,8 @@ P 7800 3300
AR Path="/4B3A13A4/4B3A1360" Ref="Q5" Part="1"
AR Path="/4B3A1333/4B3A1360" Ref="Q1" Part="1"
F 0 "Q5" H 7800 3150 60 0000 R CNN
F 1 "MPAS92" H 7800 3450 60 0000 R CNN
F 2 "Discret:TO92-CBE" H 7750 3100 20 0000 C CNN
F 1 "MPSA92" H 7800 3450 60 0000 R CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 7750 3100 10 0000 C CNN
F 3 "" H 7800 3300 60 0001 C CNN
1 7800 3300
1 0 0 1
@ -629,7 +633,7 @@ AR Path="/4B3A13A4/4B3A135F" Ref="#PWR031" Part="1"
AR Path="/4B3A1333/4B3A135F" Ref="#PWR047" Part="1"
F 0 "#PWR031" H 7300 2770 20 0001 C CNN
F 1 "HT" H 7300 2740 40 0000 C CNN
F 2 "" H 7300 2650 60 0001 C CNN
F 2 "" H 7300 2650 10 0001 C CNN
F 3 "" H 7300 2650 60 0001 C CNN
1 7300 2650
1 0 0 -1
@ -642,7 +646,7 @@ AR Path="/4B3A13A4/4B3A135E" Ref="#PWR032" Part="1"
AR Path="/4B3A1333/4B3A135E" Ref="#PWR048" Part="1"
F 0 "#PWR032" H 7900 2670 20 0001 C CNN
F 1 "HT" H 7900 2640 40 0000 C CNN
F 2 "" H 7900 2550 60 0001 C CNN
F 2 "" H 7900 2550 10 0001 C CNN
F 3 "" H 7900 2550 60 0001 C CNN
1 7900 2550
1 0 0 -1
@ -655,7 +659,7 @@ AR Path="/4B3A13A4/4B3A135D" Ref="#PWR033" Part="1"
AR Path="/4B3A1333/4B3A135D" Ref="#PWR049" Part="1"
F 0 "#PWR033" H 8600 3420 20 0001 C CNN
F 1 "HT" H 8600 3390 40 0000 C CNN
F 2 "" H 8600 3300 60 0001 C CNN
F 2 "" H 8600 3300 10 0001 C CNN
F 3 "" H 8600 3300 60 0001 C CNN
1 8600 3300
1 0 0 -1
@ -668,7 +672,7 @@ AR Path="/4B3A13A4/4B3A135C" Ref="U4" Part="2"
AR Path="/4B3A1333/4B3A135C" Ref="U3" Part="2"
F 0 "U4" H 4900 2600 60 0000 C CNN
F 1 "LM358N" H 5000 2200 50 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 5100 2150 20 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 5100 2150 10 0000 C CNN
F 3 "" H 4850 2400 60 0001 C CNN
2 4850 2400
1 0 0 -1
@ -681,7 +685,7 @@ AR Path="/4B3A13A4/4B3A135B" Ref="#U034" Part="1"
AR Path="/4B3A1333/4B3A135B" Ref="#U050" Part="1"
F 0 "#U034" H 4750 1900 20 0001 C CNN
F 1 "+12V" H 4750 2050 40 0000 C CNN
F 2 "" H 4750 1950 60 0001 C CNN
F 2 "" H 4750 1950 10 0001 C CNN
F 3 "" H 4750 1950 60 0001 C CNN
1 4750 1950
1 0 0 -1
@ -694,7 +698,7 @@ AR Path="/4B3A13A4/4B3A1359" Ref="R17" Part="1"
AR Path="/4B3A1333/4B3A1359" Ref="R7" Part="1"
F 0 "R17" V 3850 2000 50 0000 C CNN
F 1 "22K" V 3950 2000 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 3800 2000 15 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 3800 2000 10 0000 C CNN
F 3 "" H 3950 2000 60 0001 C CNN
1 3950 2000
0 1 1 0
@ -707,7 +711,7 @@ AR Path="/4B3A13A4/4B3A1358" Ref="C6" Part="1"
AR Path="/4B3A1333/4B3A1358" Ref="C3" Part="1"
F 0 "C6" V 4200 1600 50 0000 C CNN
F 1 "15nF" V 4500 1600 50 0000 C CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" V 4150 1600 15 0000 C CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" V 4150 1600 10 0000 C CNN
F 3 "" H 4350 1600 60 0001 C CNN
1 4350 1600
0 1 1 0
@ -722,7 +726,7 @@ AR Path="/4B3A13A4/4B3A1357" Ref="RV2" Part="1"
AR Path="/4B3A1333/4B3A1357" Ref="RV1" Part="1"
F 0 "RV2" H 5850 6300 50 0000 C CNN
F 1 "4,7K" H 5850 6400 50 0000 C CNN
F 2 "Discret:RV2" H 5850 6250 30 0000 C CNN
F 2 "Potentiometer_THT:Potentiometer_Bourns_3266W_Vertical" H 5850 6250 10 0000 C CNN
F 3 "" H 5850 6400 60 0001 C CNN
1 5850 6400
1 0 0 -1

46
demos/complex_hierarchy/complex_hierarchy-cache.lib
View File

@ -47,17 +47,16 @@ ENDDEF
#
# complex_hierarchy_schlib_7805
#
DEF complex_hierarchy_schlib_7805 U 0 30 N Y 1 F N
DEF complex_hierarchy_schlib_7805 U 0 20 Y Y 1 F N
F0 "U" 150 -196 60 H V C CNN
F1 "complex_hierarchy_schlib_7805" 0 200 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS LM7805 LM7812 78L05
DRAW
S -200 -150 200 150 0 1 0 N
X GND GND 0 -250 100 U 40 40 1 1 I
X VI VI -400 50 200 R 40 40 1 1 I
X VO VO 400 50 200 L 40 40 1 1 w
X VO 1 400 50 200 L 30 40 1 1 w
X GND 2 0 -250 100 U 30 40 1 1 I
X VI 3 -400 50 200 R 30 40 1 1 I
ENDDRAW
ENDDEF
#
@ -193,30 +192,9 @@ X V+ 8 -50 650 300 D 60 60 1 1 W
ENDDRAW
ENDDEF
#
# complex_hierarchy_schlib_LM358N
#
DEF complex_hierarchy_schlib_LM358N U 0 20 Y Y 2 F N
F0 "U" -50 200 60 H V L CNN
F1 "complex_hierarchy_schlib_LM358N" -50 -250 60 H V L CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS LMC6062 LMC6082 LM358N TL072 TL082
DRAW
P 4 0 1 6 -200 200 200 0 -200 -200 -200 200 f
X V- 4 -100 -400 250 U 40 40 0 1 W
X V+ 8 -100 400 250 D 40 40 0 1 W
X ~ 1 500 0 300 L 40 40 1 1 O
X - 2 -500 -100 300 R 40 40 1 1 I
X + 3 -500 100 300 R 40 40 1 1 I
X + 5 -500 100 300 R 40 40 2 1 I
X - 6 -500 -100 300 R 40 40 2 1 I
X ~ 7 500 0 300 L 40 40 2 1 O
ENDDRAW
ENDDEF
#
# complex_hierarchy_schlib_MPSA42
#
DEF complex_hierarchy_schlib_MPSA42 Q 0 40 Y N 1 F N
DEF complex_hierarchy_schlib_MPSA42 Q 0 0 Y Y 1 F N
F0 "Q" 150 -150 60 H V L CNN
F1 "complex_hierarchy_schlib_MPSA42" 150 150 60 H V L CNN
F2 "TO92-CBE" 150 0 30 H I C CNN
@ -231,15 +209,15 @@ P 3 0 1 10 0 75 0 -75 0 -75 N
P 3 0 1 0 50 -50 0 0 0 0 N
P 3 0 1 0 90 -90 100 -100 100 -100 N
P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F
X B B -200 0 200 R 40 40 1 1 I
X C C 100 200 100 D 40 40 1 1 P
X E E 100 -200 100 U 40 40 1 1 P
X E 1 100 -200 100 U 20 20 1 1 P
X B 2 -200 0 200 R 20 20 1 1 I
X C 3 100 200 100 D 20 20 1 1 P
ENDDRAW
ENDDEF
#
# complex_hierarchy_schlib_MPSA92
#
DEF complex_hierarchy_schlib_MPSA92 Q 0 40 Y N 1 F N
DEF complex_hierarchy_schlib_MPSA92 Q 0 0 Y Y 1 F N
F0 "Q" 150 -150 60 H V L CNN
F1 "complex_hierarchy_schlib_MPSA92" 150 150 60 H V L CNN
F2 "TO92-CBE" 150 0 30 H I C CNN
@ -254,9 +232,9 @@ P 3 0 1 10 0 75 0 -75 0 -75 F
P 3 0 1 0 25 -25 0 0 0 0 N
P 3 0 1 0 100 -100 65 -65 65 -65 N
P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F
X B B -200 0 200 R 40 40 1 1 I
X C C 100 200 100 D 40 40 1 1 P
X E E 100 -200 100 U 40 40 1 1 P
X E 1 100 -200 100 U 20 20 1 1 P
X B 2 -200 0 200 R 20 20 1 1 I
X C 3 100 200 100 D 20 20 1 1 P
ENDDRAW
ENDDEF
#

4510
demos/complex_hierarchy/complex_hierarchy.kicad_pcb
File diff suppressed because it is too large
View File

265
demos/complex_hierarchy/complex_hierarchy.pro
View File

@ -1,4 +1,4 @@
update=21/11/2017 21:19:54
update=01/01/2020 17:37:30
version=1
last_client=kicad
[cvpcb]
@ -6,30 +6,251 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[eeschema]
version=1
LibDir=
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
UseCmpFile=1
PadDrill=0.8128
PadDrillOvalY=0.8128
PadSizeH=2.286
PadSizeV=2.286
PcbTextSizeV=2
PcbTextSizeH=2
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.2
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=2
BoardThickness=1.6002
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2032
MinViaDiameter=0.889
MinViaDrill=0.508
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.2032
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.4
ViaDiameter1=1.651
ViaDrill1=0.6
dPairWidth1=0.4
dPairGap1=0.35
dPairViaGap1=0.25
SilkLineWidth=0.2
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.2
SilkTextItalic=0
SilkTextUpright=0
CopperLineWidth=0.3
CopperTextSizeV=2
CopperTextSizeH=2
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=0
EdgeCutLineWidth=0.09999999999999999
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=0
DimensionUnits=0
DimensionPrecision=1
SolderMaskClearance=0.254
SolderMaskMinWidth=0
DrawSegmentWidth=0.3
BoardOutlineThickness=0.09999999999999999
ModuleOutlineThickness=0.2
[pcbnew/libraries]
LibDir=
[general]
version=1
[eeschema]
version=1
LibDir=
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=top_copper
Type=1
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
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Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=bottom_copper
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.3
TrackWidth=0.4
ViaDiameter=1.651
ViaDrill=0.6
uViaDiameter=0.508
uViaDrill=0.2032
dPairWidth=0.4
dPairGap=0.35
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=power
Clearance=0.3
TrackWidth=0.6
ViaDiameter=1.651
ViaDrill=0.6
uViaDiameter=0.508
uViaDrill=0.2032
dPairWidth=0.4
dPairGap=0.35
dPairViaGap=0.25

64
demos/complex_hierarchy/complex_hierarchy.sch
View File

@ -1,6 +1,5 @@
EESchema Schematic File Version 5
LIBS:complex_hierarchy-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@ -13,6 +12,11 @@ Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
Comment5 ""
Comment6 ""
Comment7 ""
Comment8 ""
Comment9 ""
$EndDescr
NoConn ~ 8800 3050
Connection ~ 9200 2750
@ -83,7 +87,7 @@ U 1 1 4B4B15E7
P 6650 2750
F 0 "C10" H 6800 2800 50 0000 L CNN
F 1 "10uF" H 6800 2750 50 0000 L TNN
F 2 "Discret:CP6" H 6850 2650 30 0000 C CNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 6800 2650 10 0000 C CNN
F 3 "" H 6650 2750 60 0001 C CNN
1 6650 2750
1 0 0 -1
@ -94,7 +98,7 @@ U 1 1 4B4B15DA
P 9050 2300
F 0 "#PWR01" H 9050 2300 30 0001 C CNN
F 1 "GND" H 9050 2230 30 0001 C CNN
F 2 "" H 9050 2300 60 0001 C CNN
F 2 "" H 9050 2300 10 0001 C CNN
F 3 "" H 9050 2300 60 0001 C CNN
1 9050 2300
1 0 0 -1
@ -105,7 +109,7 @@ U 1 1 4B4B15D9
P 9200 2500
F 0 "C11" H 9350 2550 50 0000 L CNN
F 1 "10uF" H 9350 2500 50 0000 L TNN
F 2 "Discret:CP6" H 9550 2400 30 0000 C CNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 9550 2400 10 0000 C CNN
F 3 "" H 9200 2500 60 0001 C CNN
1 9200 2500
1 0 0 -1
@ -117,7 +121,7 @@ U 1 1 4B4B1578
P 9350 2750
F 0 "#PWR02" H 9350 2850 20 0001 C CNN
F 1 "-VAA" V 9350 2950 40 0000 C CNN
F 2 "" H 9350 2750 60 0001 C CNN
F 2 "" H 9350 2750 10 0001 C CNN
F 3 "" H 9350 2750 60 0001 C CNN
1 9350 2750
0 1 1 0
@ -128,7 +132,7 @@ U 1 1 4B4B1532
P 7900 1350
F 0 "U2" H 7900 1650 60 0000 C CNN
F 1 "78L05" H 7900 1550 60 0000 C CNN
F 2 "Discret:LM78LXX" H 8100 1150 30 0000 C CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 8150 1150 10 0000 C CNN
F 3 "" H 7900 1350 60 0001 C CNN
1 7900 1350
1 0 0 -1
@ -139,7 +143,7 @@ U 1 1 4B4B1253
P 7900 2200
F 0 "#PWR03" H 7900 2300 30 0001 C CNN
F 1 "VCC" H 7900 2300 40 0000 C CNN
F 2 "" H 7900 2200 60 0001 C CNN
F 2 "" H 7900 2200 10 0001 C CNN
F 3 "" H 7900 2200 60 0001 C CNN
1 7900 2200
1 0 0 -1
@ -150,7 +154,7 @@ U 1 1 4B4B124E
P 9200 1250
F 0 "#PWR04" H 9200 1350 30 0001 C CNN
F 1 "VCC" H 9200 1350 40 0000 C CNN
F 2 "" H 9200 1250 60 0001 C CNN
F 2 "" H 9200 1250 10 0001 C CNN
F 3 "" H 9200 1250 60 0001 C CNN
1 9200 1250
1 0 0 -1
@ -161,7 +165,7 @@ U 1 1 4B4B1237
P 7900 3600
F 0 "#PWR05" H 7900 3600 30 0001 C CNN
F 1 "GND" H 7900 3530 30 0001 C CNN
F 2 "" H 7900 3600 60 0001 C CNN
F 2 "" H 7900 3600 10 0001 C CNN
F 3 "" H 7900 3600 60 0001 C CNN
1 7900 3600
1 0 0 -1
@ -172,7 +176,7 @@ U 1 1 4B4B1230
P 7950 2900
F 0 "U1" H 7400 3300 70 0000 L CNN
F 1 "ICL7660" H 8500 2450 70 0000 R CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 8950 2300 60 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 8250 2350 10 0000 C CNN
F 3 "" H 7950 2900 60 0001 C CNN
1 7950 2900
1 0 0 -1
@ -185,7 +189,7 @@ U 1 1 4B3A1558
P 2500 1500
F 0 "C9" H 2650 1550 50 0000 L CNN
F 1 "47uF/63V" H 2650 1500 50 0000 L TNN
F 2 "Discret:CP8" H 2800 1400 30 0000 C CNN
F 2 "Capacitor_THT:CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal" H 2800 1400 10 0000 C CNN
F 3 "" H 2500 1500 60 0001 C CNN
1 2500 1500
1 0 0 -1
@ -196,7 +200,7 @@ U 1 1 4B3A1557
P 2500 1700
F 0 "#PWR06" H 2500 1700 30 0001 C CNN
F 1 "GND" H 2500 1630 30 0001 C CNN
F 2 "" H 2500 1700 60 0001 C CNN
F 2 "" H 2500 1700 10 0001 C CNN
F 3 "" H 2500 1700 60 0001 C CNN
1 2500 1700
1 0 0 -1
@ -219,7 +223,7 @@ U 1 1 4B3A1302
P 2200 1750
F 0 "#PWR07" H 2200 1750 30 0001 C CNN
F 1 "GND" H 2200 1680 30 0001 C CNN
F 2 "" H 2200 1750 60 0001 C CNN
F 2 "" H 2200 1750 10 0001 C CNN
F 3 "" H 2200 1750 60 0001 C CNN
1 2200 1750
1 0 0 -1
@ -230,7 +234,7 @@ U 1 1 4B3A12F4
P 1650 1400
F 0 "P1" V 1600 1400 40 0000 C CNN
F 1 "CONN_2" V 1700 1400 40 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 1200 30 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 1200 10 0000 C CNN
F 3 "" H 1650 1400 60 0001 C CNN
1 1650 1400
-1 0 0 -1
@ -241,7 +245,7 @@ U 1 1 4B0FA68B
P 2500 1250
F 0 "#PWR08" H 2500 1370 20 0001 C CNN
F 1 "HT" H 2500 1340 30 0000 C CNN
F 2 "" H 2500 1250 60 0001 C CNN
F 2 "" H 2500 1250 10 0001 C CNN
F 3 "" H 2500 1250 60 0001 C CNN
1 2500 1250
1 0 0 -1
@ -252,7 +256,7 @@ U 1 1 4B03CEC2
P 9200 1600
F 0 "C1" H 9350 1650 50 0000 L CNN
F 1 "47uF" H 9350 1600 50 0000 L TNN
F 2 "Discret:CP6" H 9500 1500 30 0000 C CNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 9500 1500 10 0000 C CNN
F 3 "" H 9200 1600 60 0001 C CNN
1 9200 1600
1 0 0 -1
@ -263,7 +267,7 @@ U 1 1 4B03CEC1
P 9200 1800
F 0 "#PWR09" H 9200 1800 30 0001 C CNN
F 1 "GND" H 9200 1730 30 0001 C CNN
F 2 "" H 9200 1800 60 0001 C CNN
F 2 "" H 9200 1800 10 0001 C CNN
F 3 "" H 9200 1800 60 0001 C CNN
1 9200 1800
1 0 0 -1
@ -274,7 +278,7 @@ U 1 1 4B03CE88
P 7900 1650
F 0 "#PWR010" H 7900 1650 30 0001 C CNN
F 1 "GND" H 7900 1580 30 0001 C CNN
F 2 "" H 7900 1650 60 0001 C CNN
F 2 "" H 7900 1650 10 0001 C CNN
F 3 "" H 7900 1650 60 0001 C CNN
1 7900 1650
1 0 0 -1
@ -285,7 +289,7 @@ U 1 1 4B03CE6C
P 7400 1250
F 0 "#PWR011" H 7400 1220 30 0001 C CNN
F 1 "+12C" H 7400 1360 40 0000 C CNN
F 2 "" H 7400 1250 60 0001 C CNN
F 2 "" H 7400 1250 10 0001 C CNN
F 3 "" H 7400 1250 60 0001 C CNN
1 7400 1250
1 0 0 -1
@ -296,7 +300,7 @@ U 1 1 4B03CAA3
P 2200 1250
F 0 "#U012" H 2200 1520 30 0001 C CNN
F 1 "PWR_FLAG" H 2200 1480 30 0000 C CNN
F 2 "" H 2200 1250 60 0001 C CNN
F 2 "" H 2200 1250 10 0001 C CNN
F 3 "" H 2200 1250 60 0001 C CNN
1 2200 1250
1 0 0 -1
@ -307,7 +311,7 @@ U 1 1 4B03C9F9
P 3000 2450
F 0 "#U013" H 3000 2720 30 0001 C CNN
F 1 "PWR_FLAG" H 3000 2680 30 0000 C CNN
F 2 "" H 3000 2450 60 0001 C CNN
F 2 "" H 3000 2450 10 0001 C CNN
F 3 "" H 3000 2450 60 0001 C CNN
1 3000 2450
1 0 0 -1
@ -318,7 +322,7 @@ U 1 1 4B03C68D
P 3800 2450
F 0 "#PWR014" H 3800 2420 30 0001 C CNN
F 1 "+12C" H 3800 2560 40 0000 C CNN
F 2 "" H 3800 2450 60 0001 C CNN
F 2 "" H 3800 2450 10 0001 C CNN
F 3 "" H 3800 2450 60 0001 C CNN
1 3800 2450
1 0 0 -1
@ -329,7 +333,7 @@ U 1 1 4AE17C31
P 2200 1650
F 0 "#U015" H 2200 1920 30 0001 C CNN
F 1 "PWR_FLAG" H 2200 1880 30 0000 C CNN
F 2 "" H 2200 1650 60 0001 C CNN
F 2 "" H 2200 1650 10 0001 C CNN
F 3 "" H 2200 1650 60 0001 C CNN
1 2200 1650
1 0 0 -1
@ -340,7 +344,7 @@ U 1 1 4AE173EF
P 3550 2450
F 0 "#U016" H 3550 2400 20 0001 C CNN
F 1 "+12V" H 3550 2550 40 0000 C CNN
F 2 "" H 3550 2450 60 0001 C CNN
F 2 "" H 3550 2450 10 0001 C CNN
F 3 "" H 3550 2450 60 0001 C CNN
1 3550 2450
1 0 0 -1
@ -351,7 +355,7 @@ U 1 1 4AE173D0
P 3200 3000
F 0 "#PWR017" H 3200 3000 30 0001 C CNN
F 1 "GND" H 3200 2930 30 0001 C CNN
F 2 "" H 3200 3000 60 0001 C CNN
F 2 "" H 3200 3000 10 0001 C CNN
F 3 "" H 3200 3000 60 0001 C CNN
1 3200 3000
1 0 0 -1
@ -362,7 +366,7 @@ U 1 1 4AE173CF
P 3200 2750
F 0 "C2" H 3350 2800 50 0000 L CNN
F 1 "47uF/20V" H 3350 2700 50 0000 L TNN
F 2 "Discret:CP6" H 3550 2600 30 0000 C CNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 3550 2600 10 0000 C CNN
F 3 "" H 3200 2750 60 0001 C CNN
1 3200 2750
1 0 0 -1
@ -373,7 +377,7 @@ U 1 1 4AE172F4
P 2700 2500
F 0 "D1" H 2700 2400 40 0000 C CNN
F 1 "1N4007" H 2700 2600 40 0000 C CNN
F 2 "Diode_THT:D_DO-41_SOD81_P12.70mm_Horizontal" H 2700 2350 30 0000 C CNN
F 2 "Diode_THT:D_DO-41_SOD81_P12.70mm_Horizontal" H 2700 2350 10 0000 C CNN
F 3 "" H 2700 2500 60 0001 C CNN
1 2700 2500
-1 0 0 -1
@ -384,7 +388,7 @@ U 1 1 4AD71B8E
P 2100 2800
F 0 "#PWR018" H 2100 2800 30 0001 C CNN
F 1 "GND" H 2100 2730 30 0001 C CNN
F 2 "" H 2100 2800 60 0001 C CNN
F 2 "" H 2100 2800 10 0001 C CNN
F 3 "" H 2100 2800 60 0001 C CNN
1 2100 2800
1 0 0 -1
@ -395,7 +399,7 @@ U 1 1 4AD71B06
P 1650 2600
F 0 "P2" V 1600 2600 40 0000 C CNN
F 1 "CONN_2" V 1700 2600 40 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 2400 30 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 2400 10 0000 C CNN
F 3 "" H 1650 2600 60 0001 C CNN
1 1650 2600
-1 0 0 -1

88
demos/complex_hierarchy/complex_hierarchy_schlib.lib
View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +12C
@ -9,9 +9,9 @@ F1 "+12C" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12C 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@ -24,9 +24,9 @@ F1 "+12V" 0 140 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@ -39,25 +39,25 @@ F1 "-VAA" 0 100 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 3 0 1 0 0 0 0 50 0 50 N
P 7 0 1 0 0 80 30 50 -20 50 -30 50 0 80 0 80 0 80 F
X -VAA 1 0 0 0 U 20 20 0 0 W N
P 3 0 1 0 0 0 0 50 0 50 N
P 7 0 1 0 0 80 30 50 -20 50 -30 50 0 80 0 80 0 80 F
ENDDRAW
ENDDEF
#
# 7805
#
DEF 7805 U 0 30 N Y 1 F N
DEF 7805 U 0 20 Y Y 1 F N
F0 "U" 150 -196 60 H V C CNN
F1 "7805" 0 200 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS LM7805 LM7812 78L05
ALIAS 78L05 LM7805 LM7812
DRAW
S -200 -150 200 150 0 1 0 N
X VI VI -400 50 200 R 40 40 1 1 I
X VO VO 400 50 200 L 40 40 1 1 w
X GND GND 0 -250 100 U 40 40 1 1 I
X VO 1 400 50 200 L 30 40 1 1 w
X GND 2 0 -250 100 U 30 40 1 1 I
X VI 3 -400 50 200 R 30 40 1 1 I
ENDDRAW
ENDDEF
#
@ -76,8 +76,8 @@ $FPLIST
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
@ -140,8 +140,8 @@ $FPLIST
*_Diode_*
$ENDFPLIST
DRAW
P 2 0 1 0 -30 -40 -30 40 N
P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
P 2 0 1 0 -30 -40 -30 40 N
P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
X K 1 -100 0 70 R 50 50 1 1 P
X A 2 100 0 70 L 50 50 1 1 P
ENDDRAW
@ -155,7 +155,7 @@ F1 "GND" 0 -123 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
@ -168,9 +168,9 @@ F1 "HT" 0 90 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 3 0 1 0 0 0 0 40 0 40 N
P 6 0 1 0 0 40 20 20 0 70 -20 20 0 40 0 40 N
X HT 1 0 0 0 U 20 20 0 0 W N
P 3 0 1 0 0 0 0 40 0 40 N
P 6 0 1 0 0 40 20 20 0 70 -20 20 0 40 0 40 N
ENDDRAW
ENDDEF
#
@ -200,9 +200,9 @@ F0 "U" -50 200 60 H V L CNN
F1 "LM358" -50 -250 60 H V L CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS LMC6062 LMC6082 LM358N TL072 TL082
ALIAS LM358N LMC6062 LMC6082 TL072 TL082
DRAW
P 4 0 1 6 -200 200 200 0 -200 -200 -200 200 f
P 4 0 1 6 -200 200 200 0 -200 -200 -200 200 f
X V- 4 -100 -400 250 U 40 40 0 1 W
X V+ 8 -100 400 250 D 40 40 0 1 W
X ~ 1 500 0 300 L 40 40 1 1 O
@ -216,7 +216,7 @@ ENDDEF
#
# MPSA42
#
DEF MPSA42 Q 0 40 Y N 1 F N
DEF MPSA42 Q 0 0 Y Y 1 F N
F0 "Q" 150 -150 60 H V L CNN
F1 "MPSA42" 150 150 60 H V L CNN
F2 "TO92-CBE" 150 0 30 H I C CNN
@ -226,20 +226,20 @@ $FPLIST
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 0 0 100 100 N
P 3 0 1 10 0 75 0 -75 0 -75 N
P 3 0 1 0 50 -50 0 0 0 0 N
P 3 0 1 0 90 -90 100 -100 100 -100 N
P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F
X B B -200 0 200 R 40 40 1 1 I
X C C 100 200 100 D 40 40 1 1 P
X E E 100 -200 100 U 40 40 1 1 P
P 2 0 1 0 0 0 100 100 N
P 3 0 1 10 0 75 0 -75 0 -75 N
P 3 0 1 0 50 -50 0 0 0 0 N
P 3 0 1 0 90 -90 100 -100 100 -100 N
P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F
X E 1 100 -200 100 U 20 20 1 1 P
X B 2 -200 0 200 R 20 20 1 1 I
X C 3 100 200 100 D 20 20 1 1 P
ENDDRAW
ENDDEF
#
# MPSA92
#
DEF MPSA92 Q 0 40 Y N 1 F N
DEF MPSA92 Q 0 0 Y Y 1 F N
F0 "Q" 150 -150 60 H V L CNN
F1 "MPSA92" 150 150 60 H V L CNN
F2 "TO92-CBE" 150 0 30 H I C CNN
@ -249,14 +249,14 @@ $FPLIST
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 0 0 100 100 N
P 3 0 1 10 0 75 0 -75 0 -75 F
P 3 0 1 0 25 -25 0 0 0 0 N
P 3 0 1 0 100 -100 65 -65 65 -65 N
P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F
X B B -200 0 200 R 40 40 1 1 I
X C C 100 200 100 D 40 40 1 1 P
X E E 100 -200 100 U 40 40 1 1 P
P 2 0 1 0 0 0 100 100 N
P 3 0 1 10 0 75 0 -75 0 -75 F
P 3 0 1 0 25 -25 0 0 0 0 N
P 3 0 1 0 100 -100 65 -65 65 -65 N
P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F
X E 1 100 -200 100 U 20 20 1 1 P
X B 2 -200 0 200 R 20 20 1 1 I
X C 3 100 200 100 D 20 20 1 1 P
ENDDRAW
ENDDEF
#
@ -269,7 +269,7 @@ F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
S -150 50 150 -50 0 1 0 N
P 3 0 1 0 0 50 -20 70 20 70 F
P 3 0 1 0 0 50 -20 70 20 70 F
X 1 1 -250 0 100 R 40 40 1 1 P
X 2 2 0 150 80 D 40 40 1 1 P
X 3 3 250 0 100 L 40 40 1 1 P
@ -284,8 +284,8 @@ F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
X pwr 1 0 0 0 U 20 20 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
@ -316,7 +316,7 @@ F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
P 2 0 1 0 0 0 0 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF

1
demos/complex_hierarchy/fp-lib-table
View File

@ -4,4 +4,5 @@
(lib (name "Resistor_THT")(type "KiCad")(uri "$(KISYSMOD)/Resistor_THT.pretty")(options "")(descr ""))
(lib (name "Package_TO_SOT_THT")(type "KiCad")(uri "$(KISYSMOD)/Package_TO_SOT_THT.pretty")(options "")(descr ""))
(lib (name "TerminalBlock_Altech")(type "KiCad")(uri "${KISYSMOD}/TerminalBlock_Altech.pretty")(options "")(descr ""))
(lib (name "Potentiometer_THT")(type "KiCad")(uri "${KISYSMOD}/Potentiometer_THT.pretty")(options "")(descr ""))
)

8
demos/interf_u/interf_u-cache.lib
View File

@ -180,7 +180,6 @@ F0 "U" -300 650 50 H V C CNN
F1 "interf_u_schlib_74LS245" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC245
$FPLIST
DIP?20*
$ENDFPLIST
@ -218,7 +217,6 @@ F0 "U" -300 650 50 H V C CNN
F1 "interf_u_schlib_74LS541" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HCT541
$FPLIST
DIP?20*
$ENDFPLIST
@ -291,7 +289,7 @@ DEF interf_u_schlib_Bus_ISA_8bit J 0 40 Y Y 1 F N
F0 "J" 0 1675 50 H V C CNN
F1 "interf_u_schlib_Bus_ISA_8bit" 0 -1675 50 H V C CNN
F2 "" -100 1575 30 H I C CNN
F3 "" 0 0 50 H I C CNN
F3 "https://en.wikipedia.org/wiki/Industry_Standard_Architecture" 0 0 50 H I C CNN
DRAW
S -600 -1600 600 1600 0 1 10 f
X GND 1 -900 1500 300 R 50 50 1 1 P
@ -406,7 +404,7 @@ DEF interf_u_schlib_Conn_02x08_Odd_Even J 0 40 Y N 1 F N
F0 "J" 0 450 50 H V C CNN
F1 "interf_u_schlib_Conn_02x08_Odd_Even" 0 -450 50 H V C CNN
F2 "" -50 50 50 H I C CNN
F3 "" -50 50 50 H I C CNN
F3 "~" -50 50 50 H I C CNN
$FPLIST
Connector*:*2x??x*mm*
Connector*:*2x???Pitch*
@ -618,7 +616,7 @@ DEF interf_u_schlib_LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "interf_u_schlib_LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F3 "~" 0 0 50 H I C CNN
$FPLIST
LED*
$ENDFPLIST

4486
demos/interf_u/interf_u.kicad_pcb
File diff suppressed because it is too large
View File

265
demos/interf_u/interf_u.pro
View File

@ -1,4 +1,4 @@
update=14/11/2017 08:19:23
update=02/01/2020 08:47:28
version=1
last_client=kicad
[common]
@ -12,26 +12,253 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
[pcbnew]
version=1
PageLayoutDescrFile=pagelayout_logo.kicad_wks
LastNetListRead=interf_u.net
UseCmpFile=0
PadDrill=0.89916
PadDrillOvalY=0.89916
PadSizeH=1.397
PadSizeV=1.397
PcbTextSizeV=2.032
PcbTextSizeH=1.524
PcbTextThickness=0.4318
ModuleTextSizeV=1.524
ModuleTextSizeH=1.524
ModuleTextSizeThickness=0.3048
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=2
BoardThickness=1.6002
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.8999999999999999
MinViaDrill=0.5
MinMicroViaDiameter=0.5
MinMicroViaDrill=0.127
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.4
TrackWidth2=0.381
TrackWidth3=0.762
ViaDiameter1=1.4
ViaDrill1=0.6
ViaDiameter2=1.524
ViaDrill2=0.762
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.381
SilkTextSizeV=1.524
SilkTextSizeH=1.524
SilkTextSizeThickness=0.3048
SilkTextItalic=0
SilkTextUpright=0
CopperLineWidth=0.381
CopperTextSizeV=2.032
CopperTextSizeH=1.524
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=0
EdgeCutLineWidth=0.127
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=0
DimensionUnits=0
DimensionPrecision=1
SolderMaskClearance=0.254
SolderMaskMinWidth=0
DrawSegmentWidth=0.381
BoardOutlineThickness=0.127
ModuleOutlineThickness=0.381
[eeschema]
version=1
LibDir=
SolderMaskMinWidth=0.5
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=top_copper
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=bottom_copper
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.254
TrackWidth=0.4
ViaDiameter=1.4
ViaDrill=0.6
uViaDiameter=0.5
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.254
TrackWidth=0.5
ViaDiameter=1.6
ViaDrill=0.6
uViaDiameter=0.5
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

20
demos/interf_u/interf_u.sch
View File

@ -1,6 +1,5 @@
EESchema Schematic File Version 5
LIBS:interf_u-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
@ -13,6 +12,11 @@ Comment1 "Comment 1"
Comment2 "Comment 2"
Comment3 "Comment 3"
Comment4 "Comment 4"
Comment5 ""
Comment6 ""
Comment7 ""
Comment8 ""
Comment9 ""
$EndDescr
$Bitmap
Pos 11050 10550
@ -1754,8 +1758,6 @@ Wire Wire Line
15000 3700 14950 3700
Wire Wire Line
15000 3500 12300 3500
Entry Bus Bus
3750 2350 3850 2450
$Comp
L interf_u_schlib:74LS541 U3
U 1 1 4A087146
@ -2845,8 +2847,6 @@ Wire Wire Line
6250 9900 6300 9900
Wire Wire Line
3300 7950 3250 7950
Wire Bus Line
4100 2450 3850 2450
$Comp
L interf_u_schlib:GND #GND01
U 1 1 5A0AD927
@ -2990,8 +2990,14 @@ Wire Wire Line
Wire Wire Line
1650 9400 2200 9400
Connection ~ 4750 2050
Text Label 4100 2900 0 60 ~ 0
PC-DB[0..7]
Text Label 3750 5050 0 60 ~ 0
PC-A[0..11]
Wire Bus Line
3750 2450 4100 2450
Wire Bus Line
3750 1650 3750 2350
3750 1650 3750 2450
Wire Bus Line
3300 5350 3300 6600
Wire Bus Line

6
demos/kit-dev-coldfire-xilinx_5213/in_out_conn.sch
View File

@ -932,7 +932,7 @@ U 1 1 4652B4D4
P 1050 7600
F 0 "UARTCAN203" H 1050 8150 70 0000 C CNN
F 1 "DB9" H 1050 7050 70 0000 C CNN
F 2 "kit-dev-coldfire:DB9FC" H 1050 7600 60 0001 C CNN
F 2 "Connector_Dsub:DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm" H 1050 7600 60 0001 C CNN
F 3 "" H 1050 7600 60 0001 C CNN
1 1050 7600
-1 0 0 1
@ -1081,7 +1081,7 @@ U 1 1 4652B4C2
P 1050 4950
F 0 "UARTCAN202" H 1050 5500 70 0000 C CNN
F 1 "DB9" H 1050 4400 70 0000 C CNN
F 2 "kit-dev-coldfire:DB9FC" H 1050 4950 60 0001 C CNN
F 2 "Connector_Dsub:DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm" H 1050 4950 60 0001 C CNN
F 3 "" H 1050 4950 60 0001 C CNN
1 1050 4950
-1 0 0 1
@ -1230,7 +1230,7 @@ U 1 1 4652B26D
P 1050 2300
F 0 "UARTCAN201" H 1050 2850 70 0000 C CNN
F 1 "DB9" H 1050 1750 70 0000 C CNN
F 2 "kit-dev-coldfire:DB9FC" H 1050 2300 60 0001 C CNN
F 2 "Connector_Dsub:DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm" H 1050 2300 60 0001 C CNN
F 3 "" H 1050 2300 60 0001 C CNN
1 1050 2300
-1 0 0 1

2
demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213-cache.lib
View File

@ -350,8 +350,8 @@ $FPLIST
SM*
$ENDFPLIST
DRAW
S -50 50 50 -25 0 1 0 F
P 4 0 1 8 -80 50 -80 -50 80 -50 80 50 N
P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F
X ~ 1 0 200 150 D 40 40 1 1 P
X ~ 2 0 -200 150 U 40 40 1 1 P
ENDDRAW

6305
demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213.kicad_pcb
File diff suppressed because it is too large
View File

2
demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213.pro
View File

@ -1,4 +1,4 @@
update=23/12/2019 16:47:07
update=01/01/2020 11:13:44
last_client=kicad
[general]
version=1

41
demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire.pretty/DB9FC.kicad_mod
View File

@ -1,41 +0,0 @@
(module "DB9FC" (layer F.Cu) (tedit 5D7F2FA1)
(descr "Connecteur DB9 femelle couche")
(tags "CONN DB9")
(fp_text reference "DB9FC" (at 0 -10.16) (layer F.SilkS)
(effects (font (size 1.524 1.524) (thickness 0.3048)))
)
(fp_text value "VAL***" (at 0 -5.5) (layer F.Fab)
(effects (font (size 1.524 1.524) (thickness 0.3048)))
)
(fp_line (start -16.129 2.286) (end 16.383 2.286) (layer F.SilkS) (width 0.3048))
(fp_line (start 16.383 2.286) (end 16.383 -15.494) (layer F.SilkS) (width 0.3048))
(fp_line (start 16.383 -15.494) (end -16.129 -15.494) (layer F.SilkS) (width 0.3048))
(fp_line (start -16.129 -15.494) (end -16.129 2.286) (layer F.SilkS) (width 0.3048))
(fp_line (start -9.017 -15.494) (end -9.017 -7.874) (layer F.SilkS) (width 0.3048))
(fp_line (start -9.017 -7.874) (end 9.271 -7.874) (layer F.SilkS) (width 0.3048))
(fp_line (start 9.271 -7.874) (end 9.271 -15.494) (layer F.SilkS) (width 0.3048))
(fp_line (start -7.493 -15.494) (end -7.493 -24.13) (layer F.SilkS) (width 0.3048))
(fp_line (start -7.493 -24.13) (end 7.747 -24.13) (layer F.SilkS) (width 0.3048))
(fp_line (start 7.747 -24.13) (end 7.747 -15.494) (layer F.SilkS) (width 0.3048))
(fp_line (start -16.5 2.5) (end 16.75 2.5) (layer F.CrtYd) (width 0.12))
(fp_line (start 16.75 2.5) (end 16.75 -15.75) (layer F.CrtYd) (width 0.12))
(fp_line (start 16.75 -15.75) (end 16.75 -25) (layer F.CrtYd) (width 0.12))
(fp_line (start 16.75 -25) (end -16.5 -25) (layer F.CrtYd) (width 0.12))
(fp_line (start -16.5 -25) (end -16.5 2.5) (layer F.CrtYd) (width 0.12))
(pad "" thru_hole circle (at 12.827 -1.27) (size 3.81 3.81) (drill 3.048) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at -12.573 -1.27) (size 3.81 3.81) (drill 3.048) (layers *.Cu *.Mask))
(pad "1" thru_hole rect (at -5.461 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "2" thru_hole circle (at -2.667 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "3" thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "4" thru_hole circle (at 2.794 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "5" thru_hole circle (at 5.588 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "6" thru_hole circle (at -4.064 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "7" thru_hole circle (at -1.27 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "8" thru_hole circle (at 1.397 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(pad "9" thru_hole circle (at 4.191 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))
(model "${KIPRJMOD}/prj.3dshapes/db9_female_pin90deg.wrl"
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
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