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Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
12 years ago
Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
12 years ago
Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
12 years ago
Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
12 years ago
Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
12 years ago
  1. /**
  2. * @file class_netinfolist.cpp
  3. */
  4. #include <fctsys.h>
  5. #include <gr_basic.h>
  6. #include <common.h>
  7. #include <class_drawpanel.h>
  8. #include <macros.h>
  9. #include <pcbnew.h>
  10. #include <class_board.h>
  11. #include <class_module.h>
  12. #include <class_netinfo.h>
  13. // Constructor and destructor
  14. NETINFO_LIST::NETINFO_LIST( BOARD* aParent ) : m_Parent( aParent )
  15. {
  16. // Make sure that the unconnected net has number 0
  17. AppendNet( new NETINFO_ITEM( aParent, wxEmptyString, 0 ) );
  18. }
  19. NETINFO_LIST::~NETINFO_LIST()
  20. {
  21. clear();
  22. }
  23. void NETINFO_LIST::clear()
  24. {
  25. NETNAMES_MAP::iterator it, itEnd;
  26. for( it = m_netNames.begin(), itEnd = m_netNames.end(); it != itEnd; ++it )
  27. delete it->second;
  28. m_PadsFullList.clear();
  29. m_netNames.clear();
  30. m_netCodes.clear();
  31. }
  32. void NETINFO_LIST::AppendNet( NETINFO_ITEM* aNewElement )
  33. {
  34. // negative net code means that it has to be auto assigned
  35. if( aNewElement->m_NetCode < 0 )
  36. const_cast<int&>( aNewElement->m_NetCode ) = getFreeNetCode();
  37. // net names & codes are supposed to be unique
  38. assert( GetNetItem( aNewElement->GetNetname() ) == NULL );
  39. assert( GetNetItem( aNewElement->GetNet() ) == NULL );
  40. // add an entry for fast look up by a net name using a map
  41. m_netNames.insert( std::make_pair( aNewElement->GetNetname(), aNewElement ) );
  42. m_netCodes.insert( std::make_pair( aNewElement->GetNet(), aNewElement ) );
  43. }
  44. /* sort function, to sort pad list by netnames
  45. * this is a case sensitive sort.
  46. * DO NOT change it because NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname )
  47. * when search a net by its net name does a binary search
  48. * and expects to have a nets list sorted by an alphabetic case sensitive sort
  49. */
  50. static bool padlistSortByNetnames( const D_PAD* a, const D_PAD* b )
  51. {
  52. return ( a->GetNetname().Cmp( b->GetNetname() ) ) < 0;
  53. }
  54. /**
  55. * Compute and update the net_codes for PADS et and equipots (.m_NetCode member)
  56. * net_codes are >= 1 (net_code = 0 means not connected)
  57. * Update the net buffer
  58. * Must be called after editing pads (netname, or deleting) or after read a netlist
  59. * set to 1 flag NET_CODE_OK of m_Pcb->m_Status_Pcb;
  60. * m_Pcb->m_NbNodes and m_Pcb->m_NbNets are updated
  61. * Be aware NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname )
  62. * when search a net by its net name does a binary search
  63. * and expects to have a nets list sorted by an alphabetic case sensitive sort
  64. * So do not change Build_Pads_Full_List() which build a sorted list of pads
  65. */
  66. void NETINFO_LIST::buildListOfNets()
  67. {
  68. D_PAD* pad;
  69. int nodes_count = 0;
  70. // Build the PAD list, sorted by net
  71. buildPadsFullList();
  72. // Restore the initial state of NETINFO_ITEMs
  73. for( unsigned i = 0; i < GetNetCount(); ++i )
  74. GetNetItem( i )->Clear();
  75. // Assign pads to appropriate NETINFO_ITEMs
  76. for( unsigned ii = 0; ii < m_PadsFullList.size(); ii++ )
  77. {
  78. pad = m_PadsFullList[ii];
  79. if( pad->GetNet() == 0 ) // pad not connected
  80. continue;
  81. // Add pad to the appropriate list of pads
  82. GetNetItem( pad->GetNet() )->m_PadInNetList.push_back( pad );
  83. ++nodes_count;
  84. }
  85. m_Parent->SetNodeCount( nodes_count );
  86. m_Parent->SynchronizeNetsAndNetClasses( );
  87. m_Parent->m_Status_Pcb |= NET_CODES_OK;
  88. m_Parent->SetAreasNetCodesFromNetNames();
  89. }
  90. #if defined(DEBUG)
  91. void NETINFO_LIST::Show() const
  92. {
  93. int i = 0;
  94. NETNAMES_MAP::const_iterator it, itEnd;
  95. for( it = m_netNames.begin(), itEnd = m_netNames.end(); it != itEnd; ++it )
  96. {
  97. printf( "[%d]: netcode:%d netname:<%s>\n",
  98. i++, it->second->GetNet(),
  99. TO_UTF8( it->second->GetNetname() ) );
  100. }
  101. }
  102. #endif
  103. void NETINFO_LIST::buildPadsFullList()
  104. {
  105. /*
  106. * initialize:
  107. * m_Pads (list of pads)
  108. * set m_Status_Pcb = LISTE_PAD_OK;
  109. * also clear m_Pcb->m_FullRatsnest that could have bad data
  110. * (m_Pcb->m_FullRatsnest uses pointer to pads)
  111. * Be aware NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname )
  112. * when search a net by its net name does a binary search
  113. * and expects to have a nets list sorted by an alphabetic case sensitive sort
  114. * So do not change the sort function used here
  115. */
  116. if( m_Parent->m_Status_Pcb & LISTE_PAD_OK )
  117. return;
  118. // empty the old list
  119. m_PadsFullList.clear();
  120. m_Parent->m_FullRatsnest.clear();
  121. // Clear variables used in ratsnest computation
  122. for( MODULE* module = m_Parent->m_Modules; module; module = module->Next() )
  123. {
  124. for( D_PAD* pad = module->Pads(); pad; pad = pad->Next() )
  125. {
  126. m_PadsFullList.push_back( pad );
  127. pad->SetSubRatsnest( 0 );
  128. pad->SetParent( module );
  129. }
  130. }
  131. // Sort pad list per net
  132. sort( m_PadsFullList.begin(), m_PadsFullList.end(), padlistSortByNetnames );
  133. m_Parent->m_Status_Pcb = LISTE_PAD_OK;
  134. }
  135. int NETINFO_LIST::getFreeNetCode() const
  136. {
  137. do {
  138. if( m_newNetCode < 0 )
  139. m_newNetCode = 0;
  140. } while( m_netCodes.count( ++NETINFO_LIST::m_newNetCode ) != 0 );
  141. return m_newNetCode;
  142. }
  143. const NETINFO_ITEM NETINFO_LIST::ORPHANED = NETINFO_ITEM( NULL, wxString( "orphaned" ), -1 );
  144. const int NETINFO_LIST::UNCONNECTED = 0;
  145. int NETINFO_LIST::m_newNetCode = 0;