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393 lines
8.5 KiB

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  1. {
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  31. "other_text_size_h": 1.0,
  32. "other_text_size_v": 1.0,
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  35. "pads": {
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  39. },
  40. "silk_line_width": 0.12,
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  45. "silk_text_upright": false,
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  49. }
  50. },
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  53. "meta": {
  54. "version": 1
  55. },
  56. "rule_severities": {
  57. "annular_width": "error",
  58. "clearance": "error",
  59. "copper_edge_clearance": "error",
  60. "courtyards_overlap": "error",
  61. "diff_pair_gap_out_of_range": "error",
  62. "diff_pair_uncoupled_length_too_long": "error",
  63. "drill_out_of_range": "error",
  64. "duplicate_footprints": "warning",
  65. "extra_footprint": "warning",
  66. "hole_clearance": "error",
  67. "hole_near_hole": "error",
  68. "invalid_outline": "error",
  69. "item_on_disabled_layer": "error",
  70. "items_not_allowed": "error",
  71. "length_out_of_range": "error",
  72. "malformed_courtyard": "error",
  73. "microvia_drill_out_of_range": "error",
  74. "missing_courtyard": "ignore",
  75. "missing_footprint": "warning",
  76. "net_conflict": "warning",
  77. "npth_inside_courtyard": "ignore",
  78. "padstack": "error",
  79. "pth_inside_courtyard": "ignore",
  80. "shorting_items": "error",
  81. "silk_over_copper": "error",
  82. "silk_overlap": "error",
  83. "skew_out_of_range": "error",
  84. "too_many_vias": "error",
  85. "track_dangling": "warning",
  86. "track_width": "error",
  87. "tracks_crossing": "error",
  88. "unconnected_items": "error",
  89. "unresolved_variable": "error",
  90. "via_dangling": "warning",
  91. "zone_has_empty_net": "error",
  92. "zones_intersect": "error"
  93. },
  94. "rules": {
  95. "allow_blind_buried_vias": false,
  96. "allow_microvias": false,
  97. "max_error": 0.005,
  98. "min_clearance": 0.0,
  99. "min_copper_edge_clearance": 0.01,
  100. "min_hole_clearance": 0.0,
  101. "min_hole_to_hole": 0.25,
  102. "min_microvia_diameter": 0.19999999999999998,
  103. "min_microvia_drill": 0.09999999999999999,
  104. "min_silk_clearance": 0.0,
  105. "min_through_hole_diameter": 0.3,
  106. "min_track_width": 0.19999999999999998,
  107. "min_via_annular_width": 0.049999999999999996,
  108. "min_via_diameter": 0.39999999999999997,
  109. "solder_mask_clearance": 0.0,
  110. "solder_mask_min_width": 0.0,
  111. "solder_paste_clearance": 0.0,
  112. "solder_paste_margin_ratio": 0.0
  113. },
  114. "track_widths": [],
  115. "via_dimensions": [],
  116. "zones_allow_external_fillets": true,
  117. "zones_use_no_outline": true
  118. },
  119. "layer_presets": []
  120. },
  121. "boards": [],
  122. "cvpcb": {
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  124. },
  125. "erc": {
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  275. "rule_severities": {
  276. "bus_definition_conflict": "error",
  277. "bus_label_syntax": "error",
  278. "bus_to_bus_conflict": "error",
  279. "bus_to_net_conflict": "error",
  280. "different_unit_footprint": "error",
  281. "different_unit_net": "error",
  282. "duplicate_sheet_names": "error",
  283. "global_label_dangling": "warning",
  284. "hier_label_mismatch": "error",
  285. "label_dangling": "error",
  286. "lib_symbol_issues": "warning",
  287. "multiple_net_names": "warning",
  288. "net_not_bus_member": "warning",
  289. "no_connect_connected": "warning",
  290. "no_connect_dangling": "warning",
  291. "pin_not_connected": "error",
  292. "pin_not_driven": "error",
  293. "pin_to_pin": "warning",
  294. "power_pin_not_driven": "error",
  295. "similar_labels": "warning",
  296. "unresolved_variable": "error",
  297. "wire_dangling": "error"
  298. }
  299. },
  300. "legacy": {
  301. "common": {
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  304. },
  305. "libraries": {
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  309. "meta": {
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  311. "version": 1
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  313. "net_settings": {
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  318. "diff_pair_gap": 0.25,
  319. "diff_pair_via_gap": 0.25,
  320. "diff_pair_width": 0.2,
  321. "line_style": 0,
  322. "microvia_diameter": 0.508,
  323. "microvia_drill": 0.127,
  324. "name": "Default",
  325. "pcb_color": "rgba(0, 0, 0, 0.000)",
  326. "schematic_color": "rgba(0, 0, 0, 0.000)",
  327. "track_width": 0.4,
  328. "via_diameter": 0.9,
  329. "via_drill": 0.6,
  330. "wire_width": 6.0
  331. }
  332. ],
  333. "meta": {
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  336. "net_colors": null
  337. },
  338. "pcbnew": {
  339. "last_paths": {
  340. "gencad": "",
  341. "idf": "",
  342. "netlist": "",
  343. "specctra_dsn": "",
  344. "step": "",
  345. "vrml": ""
  346. },
  347. "page_layout_descr_file": ""
  348. },
  349. "schematic": {
  350. "drawing": {
  351. "default_bus_thickness": 12.0,
  352. "default_junction_size": 40.0,
  353. "default_line_thickness": 6.0,
  354. "default_text_size": 50.0,
  355. "default_wire_thickness": 6.0,
  356. "field_names": [],
  357. "intersheets_ref_prefix": "",
  358. "intersheets_ref_short": false,
  359. "intersheets_ref_show": false,
  360. "intersheets_ref_suffix": "",
  361. "junction_size_choice": 3,
  362. "pin_symbol_size": 25.0,
  363. "text_offset_ratio": 0.3
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  365. "legacy_lib_dir": "",
  366. "legacy_lib_list": [],
  367. "meta": {
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  370. "net_format_name": "",
  371. "page_layout_descr_file": "",
  372. "plot_directory": "",
  373. "spice_adjust_passive_values": false,
  374. "spice_external_command": "spice \"%I\"",
  375. "subpart_first_id": 65,
  376. "subpart_id_separator": 0
  377. },
  378. "sheets": [
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  380. "00000000-0000-0000-0000-000048553e53",
  381. ""
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  383. [
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  385. "pic_programmer"
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  387. [
  388. "00000000-0000-0000-0000-000048553e7c",
  389. "sockets"
  390. ]
  391. ],
  392. "text_variables": {}
  393. }