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  1. #ifndef Py_LIMITED_API
  2. #ifndef Py_ATOMIC_H
  3. #define Py_ATOMIC_H
  4. /* XXX: When compilers start offering a stdatomic.h with lock-free
  5. atomic_int and atomic_address types, include that here and rewrite
  6. the atomic operations in terms of it. */
  7. #include "dynamic_annotations.h"
  8. #ifdef __cplusplus
  9. extern "C" {
  10. #endif
  11. /* This is modeled after the atomics interface from C1x, according to
  12. * the draft at
  13. * http://www.open-std.org/JTC1/SC22/wg14/www/docs/n1425.pdf.
  14. * Operations and types are named the same except with a _Py_ prefix
  15. * and have the same semantics.
  16. *
  17. * Beware, the implementations here are deep magic.
  18. */
  19. typedef enum _Py_memory_order {
  20. _Py_memory_order_relaxed,
  21. _Py_memory_order_acquire,
  22. _Py_memory_order_release,
  23. _Py_memory_order_acq_rel,
  24. _Py_memory_order_seq_cst
  25. } _Py_memory_order;
  26. typedef struct _Py_atomic_address {
  27. void *_value;
  28. } _Py_atomic_address;
  29. typedef struct _Py_atomic_int {
  30. int _value;
  31. } _Py_atomic_int;
  32. /* Only support GCC (for expression statements) and x86 (for simple
  33. * atomic semantics) for now */
  34. #if defined(__GNUC__) && (defined(__i386__) || defined(__amd64))
  35. static __inline__ void
  36. _Py_atomic_signal_fence(_Py_memory_order order)
  37. {
  38. if (order != _Py_memory_order_relaxed)
  39. __asm__ volatile("":::"memory");
  40. }
  41. static __inline__ void
  42. _Py_atomic_thread_fence(_Py_memory_order order)
  43. {
  44. if (order != _Py_memory_order_relaxed)
  45. __asm__ volatile("mfence":::"memory");
  46. }
  47. /* Tell the race checker about this operation's effects. */
  48. static __inline__ void
  49. _Py_ANNOTATE_MEMORY_ORDER(const volatile void *address, _Py_memory_order order)
  50. {
  51. switch(order) {
  52. case _Py_memory_order_release:
  53. case _Py_memory_order_acq_rel:
  54. case _Py_memory_order_seq_cst:
  55. _Py_ANNOTATE_HAPPENS_BEFORE(address);
  56. break;
  57. default:
  58. break;
  59. }
  60. switch(order) {
  61. case _Py_memory_order_acquire:
  62. case _Py_memory_order_acq_rel:
  63. case _Py_memory_order_seq_cst:
  64. _Py_ANNOTATE_HAPPENS_AFTER(address);
  65. break;
  66. default:
  67. break;
  68. }
  69. }
  70. #define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
  71. __extension__ ({ \
  72. __typeof__(ATOMIC_VAL) atomic_val = ATOMIC_VAL; \
  73. __typeof__(atomic_val->_value) new_val = NEW_VAL;\
  74. volatile __typeof__(new_val) *volatile_data = &atomic_val->_value; \
  75. _Py_memory_order order = ORDER; \
  76. _Py_ANNOTATE_MEMORY_ORDER(atomic_val, order); \
  77. \
  78. /* Perform the operation. */ \
  79. _Py_ANNOTATE_IGNORE_WRITES_BEGIN(); \
  80. switch(order) { \
  81. case _Py_memory_order_release: \
  82. _Py_atomic_signal_fence(_Py_memory_order_release); \
  83. /* fallthrough */ \
  84. case _Py_memory_order_relaxed: \
  85. *volatile_data = new_val; \
  86. break; \
  87. \
  88. case _Py_memory_order_acquire: \
  89. case _Py_memory_order_acq_rel: \
  90. case _Py_memory_order_seq_cst: \
  91. __asm__ volatile("xchg %0, %1" \
  92. : "+r"(new_val) \
  93. : "m"(atomic_val->_value) \
  94. : "memory"); \
  95. break; \
  96. } \
  97. _Py_ANNOTATE_IGNORE_WRITES_END(); \
  98. })
  99. #define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
  100. __extension__ ({ \
  101. __typeof__(ATOMIC_VAL) atomic_val = ATOMIC_VAL; \
  102. __typeof__(atomic_val->_value) result; \
  103. volatile __typeof__(result) *volatile_data = &atomic_val->_value; \
  104. _Py_memory_order order = ORDER; \
  105. _Py_ANNOTATE_MEMORY_ORDER(atomic_val, order); \
  106. \
  107. /* Perform the operation. */ \
  108. _Py_ANNOTATE_IGNORE_READS_BEGIN(); \
  109. switch(order) { \
  110. case _Py_memory_order_release: \
  111. case _Py_memory_order_acq_rel: \
  112. case _Py_memory_order_seq_cst: \
  113. /* Loads on x86 are not releases by default, so need a */ \
  114. /* thread fence. */ \
  115. _Py_atomic_thread_fence(_Py_memory_order_release); \
  116. break; \
  117. default: \
  118. /* No fence */ \
  119. break; \
  120. } \
  121. result = *volatile_data; \
  122. switch(order) { \
  123. case _Py_memory_order_acquire: \
  124. case _Py_memory_order_acq_rel: \
  125. case _Py_memory_order_seq_cst: \
  126. /* Loads on x86 are automatically acquire operations so */ \
  127. /* can get by with just a compiler fence. */ \
  128. _Py_atomic_signal_fence(_Py_memory_order_acquire); \
  129. break; \
  130. default: \
  131. /* No fence */ \
  132. break; \
  133. } \
  134. _Py_ANNOTATE_IGNORE_READS_END(); \
  135. result; \
  136. })
  137. #else /* !gcc x86 */
  138. /* Fall back to other compilers and processors by assuming that simple
  139. volatile accesses are atomic. This is false, so people should port
  140. this. */
  141. #define _Py_atomic_signal_fence(/*memory_order*/ ORDER) ((void)0)
  142. #define _Py_atomic_thread_fence(/*memory_order*/ ORDER) ((void)0)
  143. #define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
  144. ((ATOMIC_VAL)->_value = NEW_VAL)
  145. #define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
  146. ((ATOMIC_VAL)->_value)
  147. #endif /* !gcc x86 */
  148. /* Standardized shortcuts. */
  149. #define _Py_atomic_store(ATOMIC_VAL, NEW_VAL) \
  150. _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, _Py_memory_order_seq_cst)
  151. #define _Py_atomic_load(ATOMIC_VAL) \
  152. _Py_atomic_load_explicit(ATOMIC_VAL, _Py_memory_order_seq_cst)
  153. /* Python-local extensions */
  154. #define _Py_atomic_store_relaxed(ATOMIC_VAL, NEW_VAL) \
  155. _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, _Py_memory_order_relaxed)
  156. #define _Py_atomic_load_relaxed(ATOMIC_VAL) \
  157. _Py_atomic_load_explicit(ATOMIC_VAL, _Py_memory_order_relaxed)
  158. #ifdef __cplusplus
  159. }
  160. #endif
  161. #endif /* Py_ATOMIC_H */
  162. #endif /* Py_LIMITED_API */